Tensilica®, Inc. has added support for Avnet’s Xilinx Virtex-4 LX200 Development Kit for high-speed hardware-based simulations of the Xtensa® configurable and Diamond Standard processor families. By emulating the Tensilica processors in an Avnet FPGA board, software developers can significantly speed up development cycles when compared to using only software simulation methods.
Tensilica’s software developers’ toolkits (SDKs) consist of an IDE (the Xtensa® Xplorer(tm) integrated design environment), code development toolchain, and Tensilica’s instruction set simulator (ISS). The SDKs work seamlessly with the Avnet FPGA board. The software tools include libraries that enable software developers to use standard C library functions such as print to print out to the host PC and read/write from the hard disk of the host PC.
Designers using Tensilica’s processors can take maximum advantage of an Avnet Virtex-4 Development Kit to gather extensive hardware-based profiling information. With hardware-based profiling, developers can get an execution profile of the program, which allows the developer to quickly pinpoint execution hotspots. This profile can be viewed graphically within Tensilica’s Xtensa Xplorer IDE.
Using feedback compilation, a developer can set a flag so statistics can be collected on the number of times branches (loops, jumps, etc.) are taken or not taken during execution on the Avnet Xilinx Development Kit board. The Xtensa C/C++ compiler then uses these run-time generated statistics and recompiles the program to optimize (a) for speed by placing most frequently taken branches in straight-line code, and (b) for code size by compiling less frequently executed routines for code size rather than speed. The feedback-based compilation method speeds up applications between 5 to 15 percent and reduces code size by up to 15 percent.
In addition, the Ethernet interface on the boards are ideal for running an operating system such as Linux and the associated TCP/IP stack and network file systems.
Tensilica supplies users with precompiled FPGA bitstreams that support the LX200 board. Bitstreams for the Diamond Standard processor family for the Avnet FPGA board is available now from Tensilica starting at $3000. For users of Tensilica’s Xtensa configurable processors, the Tensilica processor generator automatically creates a custom FPGA bitstream specific to the Avnet boards for each new Xtensa core configuration. Tensilica customers can use these bitstreams on an unlimited number of Avnet LX200 boards, thus enabling development teams with large numbers of software designers to cost-effectively deploy a large number of development systems.