Xilinx System Generator for DSP, AccelDSP Synthesis Tool 10.1

Posted by Ken Cheung in Tool on Monday, April 14, 2008

Xilinx, Inc. (Nasdaq: XLNX) announced the availability of versions 10.1 of the System Generator for DSP tool and the AccelDSP(TM) synthesis tool. With support for the new Virtex(R)-5 FXT platform, the newest release delivers the industry's first ESL design methodology to enable a direct FPGA implementation path for DSP algorithms described using imaginary and complex numbers. The tools also deliver improved support for interfacing to external video sources through the MicroBlaze(TM) embedded processor, as well as the first FPGA based hardware co-simulation for the MATLAB(R) modeling environment.

The XtremeDSP Solutions Tools Package can be purchased as an option to the ISE(R) Design Suite for $1,495 (DO-DSP-PC) or as part of the XtremeDSP Development Kit - Virtex-5 FPGA DSP Edition (DO-V5-DSP-DK-SG-UNI-G) that also includes an ML506 hardware platform for $1695. System Generator for DSP and the AccelDSP synthesis tool continue to be available separately for $895 and $995 respectively.

New Features

  • Support for Native Complex Numbers
    The AccelDSP synthesis tool is the first ESL design tool available that provides a direct FPGA implementation path for DSP algorithms described using imaginary and complex numbers. Support of native complex numbers enables algorithm developers to target Xilinx FPGAs early in development with minimal source code modifications during prototyping, feasibility analysis and design exploration stages. Complex arithmetic is used extensively in DSP algorithms for communications, defense and medical applications. Unlike C, VHDL or Verilog, MATLAB provides built-in support for the imaginary unit "i" or "j," complex data types and complex arithmetic expressions using these datatypes. This nomenclature can be used to describe complex algorithms with 75 to 85 percent fewer lines of code.
  • Improved Video Support
    The XtremeDSP solution now includes improved support for interfacing to external video sources through the MicroBlaze embedded processor. The Xilinx Embedded Development Kit (EDK) now also supports a new Video Frame Buffer Controller (VFBC) IP core that allows reading and writing of buffered video data in two-dimensional sets regardless of the size or organization of the external memory transactions. This VFBC is implemented as part of an embedded system that interfaces to external memories and video sources. System Generator 10.1 software supports the generation of custom peripherals for Xilinx Platform Studio (XPS) to enable asynchronous clocking between the embedded and video processing sub-systems. This clocking scheme allows the video source and processing hardware to exist in separate clock domains typical of real world video applications.
  • Hardware Co-Simulation
    Xilinx offers the industry's first FPGA based hardware co-simulation for the MATLAB modeling environment. Developers of FPGA based DSP applications can now verify their designs running on Xilinx hardware platforms while leveraging all the signal generation and analysis capabilities of the MATLAB simulation environment. Computationally intensive algorithms, such as bit error rate (BER) testing of wireless transmissions, simulate up to 1,000 times faster using this verification methodology.

More info: Xilinx XtremeDSP Solution

If you found this page useful, bookmark and share it on:

Possibly of Interest

 
FPGA Blog Newsletter
Don't have time to visit FPGA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:   

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.