VMETRO announced the XMC-FPGA05F, which is a new generation user programmable FPGA XMC/PMC module with fiber-optic transceivers. The XMC-FPGA05F features the Xilinx® Virtex®-5 FPGA with four front panel fiber-optic transceivers in air- or conduction-cooled versions. The popularity of high-speed serial interconnects in embedded real-time DSP systems and the effectiveness of FPGAs to interface to sensor I/O makes the XMC-FPGA05F ideal for demanding real-time applications such as remote sensor interfaces, data recorders, and embedded real-time distributed computing.
VMETRO XMC-FPGA05F Features
- Up to four fiber-optic transceivers
- User programmable Xilinx Virtex-5 FPGA (SX95T, LX155T or FX100T)
- Four banks of DDR2 SDRAM memory
- PMC/XMC form-factor (HSS links or PCI Express)
- VxWorks, Linux and Windows host support
- Commercial and rugged build options
The XMC-FPGA05F features a Xilinx Virtex-5 FPGA, high-speed fiber-optic transceivers, DDR2 SDRAM memory, DMA controllers and a choice of interfaces. The XMC-FPGA05F is designed to be a user programmable FPGA resource and can be supplied with a choice of Xilinx Virtex-5 FPGAs including SX95T or LX155T (-2 speed grade) parts. The choice of FPGAs allows the XMC-FPGA05F to be optimized to provide the largest amount of DSP capabilities or maximum number of logic gates. Alternative FPGAs can be provided on request. Fiber-optic links are enabled by four single- or multi-mode, front panel, fiber-optic transceivers that support speeds including 2.015, 2.5 and 3.125Gbps. An IP core for fiber-optic protocols such as Aurora[tm], Serial FPDP, Serial RapidIO® or Ethernet can be loaded into the FPGA to handle data flow through the transceivers.
The XMC-FPGA05F has four 128MB banks of DDR2 SDRAM memory with bandwidth approaching 1GB/s. The PMC/XMC form-factor board supports both PCI-X/PCI and x8 PCI Express® 1.1 host interfaces. DMA controllers simplify data movement with enough channels to support dedicated DMA controller for each fiber-optic interface. The XMC-FPGA05F has onboard FLASH to store multiple FPGA images and a “FLASH bypass mode” for secure applications to enable direct FPGA configuration by PCI, PCI-X or PCI Express host interfaces. In addition, there is a 64-bit user I/O option via either the PMC Pn4 or XMC Pn6 ports which is directly linked to FPGA for high-speed parallel or custom I/O from the backplane or host.
More information: VMETRO XMC-FPGA05F