Helion DeviceDNA Checker

Posted by Ken Cheung in IP Core on Tuesday, January 8, 2008

Xilinx, Inc. (Nasdaq: XLNX) has partnered with Helion Technology to enhance the security features in the Spartan(TM)-3 FPGAs. The new Helion intellectual property (IP) cores leverages Xilinx DeviceDNA design security solution to further streamline and strengthen safeguards against reverse engineering, cloning, and unauthorized overbuilding. DeviceDNA features a permanent factory-set ID code that is different in every device.

Helion has developed IP that enables designers to easily implement the Xilinx DeviceDNA technology in their designs. The Helion approach uses a selection of cryptographic functions to implement the security algorithm and various obfuscation techniques, ensuring that any reverse engineering attacks on the design are made suitably difficult. Most importantly, the IP is highly parameterized allowing each user to make their implementation unique, thus preventing others using the same IP from working around the security scheme.

Helion's DeviceDNA Checker has relatively low resource requirements and a simple interface. It can be easily dropped into the user design alongside the main FPGA application. The checker uses input from the DeviceDNA block in the FPGA plus other stored values to initiate processing and subsequently generate a "pass/fail" flag. This flag can be used to degrade normal operation of the rest of the design if the check does not pass.

The DeviceDNA Checker uses the DeviceDNA code, plus additional check bits that are stored in non-volatile system memory to enhance security. These bits are a mixed up combination of randomly generated bits that form part of the check algorithm, randomly generated bits that are ignored, and the final stored check code itself. The additional data is simply streamed into the checker after the DeviceDNA bits.

Pricing for the Helion DeviceDNA solution depends on the exact configuration and security level required, with multi-use site licenses starting at $25k USD. Preliminary technical information is available from Helion today, and the IP itself will be available this quarter.

More info: Xilinx | Helion

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