Barco Silex released the multi-channel Video over IP with JPEG 2000 reference design. The VoIP reference design integrates the BarcoSilex JPEG 2000 Encoder and Decoder IP Cores, the Barco Silex high-performance memory controller core, and the Xilinx SMPTE 2022-1/2 and Ethernet MAC LogiCORE IP Cores for Xilinx 7 Series FPGAs and Zynq All Programmable SoC.
The new reference design can encapsulate and de-encapsulate up to four High Definition streams (1080p60). It can optionally compress or decompress four streams with JPEG 2000, and transport them over 1Gb/s (compression) or 10 Gb/s (uncompressed) Ethernet. The Barco Silex high-performance memory controller stitches multiple video streams of bandwidth together into a smooth, high-data rate system.
Also integrated in the reference design is the JPEG 2000 codestream wrapping in MPEG-2 TS, compliant with the VSF (Video Services Forum) Technical Recommendation Transport of JPEG 2000 Broadcast profile video in MPEG-2 TS over IP.
The compactness and high-speed performance of the Barco Silex JPEG 2000 cores and Xilinx FPGA and SoC devices benefit from a hardware-proven solution to accelerate their product development with standard-compliant and high-performance Video over IP transport and JPEG 2000 coding.
Manufacturers can leverage the reprogrammable nature of Xilinx’s 7 series devices to ensure products comply with changes to standards. The reference design is ideal for Video over IP bridges, routers and production switchers, encoders and decoders.
More info: Barco Silex