FPGA Blog - field programmable gate array and structured asic

Share/BookmarkSubscribe

Xilinx Virtex-5QV Rad-Hard Reconfigurable FPGA

Posted by Ken Cheung in FPGA on Monday, July 19, 2010

Xilinx introduced the Virtex-5QV high-density, rad-hard reconfigurable FPGA. The off-the-shelf Xilinx Virtex-5QV FPGA offers the industry’s highest density, performance and integration capabilities for complex systems that would otherwise require rad-hard ASIC devices with their high development costs and long lead times, or traditional one-time programmable (OTP) solutions. The Xilinx Virtex-5QV FPGA is ideal for low earth-orbiting satellites and systems supporting inter-planetary missions. The Virtex-5QV device will be sampling this quarter with general production availability planned for first half calendar year 2011.

Xilinx Virtex-5QV rad-hard reconfigurable FPGA for space applications

Xilinx Virtex-5QV FPGA Highlights

  • Highest levels of in-beam testing by the Xilinx Radiation Test Consortium (XRTC)
  • Protection against Single-Event-Upset (SEU)
  • Total Immunity to Single-Event Latchup (SEL)
  • High tolerance to Total Ionizing Dose (TID)
  • Data path protection from Single-Event Transients (SET)
  • Configuration memory provides nearly 1,000 times the SEU hardness of the standard cell latches
  • Configuration control logic and the JTAG controller have been hardened with embedded triple module redundancy
  • Built on the second-generation ASMBL column-based architecture
  • Xilinx ISE Design Suite support
  • Flexible 36-Kbit/18-Kbit block RAM/FIFOs
  • Second generation 25×18 DSP slices
  • Power-optimized high-speed serial transceiver blocks for enhanced serial connectivity
  • PCI Express compliant integrated Endpoint blocks
  • Offers 130,000 logic cells
  • 320 DSP Slices supporting fixed and floating point operations
  • 836 user I/Os programmable to more than 30 different standards
  • Integrated high-speed connectivity solution for space
  • 18 channels of 3Gbps Multi-gigabit Serial Transceivers for chip-to-chip, board-to-board and box-to-box communication

More info: Xilinx Aerospace and Defense

Related Posts with Thumbnails

Custom Search

FPGA Blog Newsletter
Don't have time to visit FPGA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:  

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.