Xilinx SFI-5 Interface Reference Design

Xilinx, Inc. (Nasdaq: XLNX) is offering a free hardware-verified reference design for the optical internetworking forum (OIF) SERDES framer interface level 5 (SFI-5) standard. The SFI-5 interface enables communication between the optical transmission devices and the network processing system. Based on its 65nm Xilinx(R) Virtex(TM)-5 LX330T FPGAs, the reference design accelerates the development of wired networking systems requiring 40Gbps payload rates, enabling applications using transport interfaces like OC768/STM256 and OTN OTU-3 in systems such as optical cross connects, fiber optics terminators and repeaters, 40G multiplexers, and test equipment. The free reference design for SFI-5 interface is available for download. The Virtex-5 LX330T FPGA is available today and the ML525 development board will be available in May 2008.

The reference design has been hardware verified on the Xilinx ML525 evaluation platform and characterized for skew, temperature, process, and voltage variations to ensure reliable interface, compatible with the OIF SFI-5 standard. Leveraging the industry’s lowest power transceivers — typically consuming less than 100mW per transmitter/receiver pair — this Virtex-5 LXT FPGA-based reference design uses 17 transceivers (16 for data and one for calibration).

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