Xilinx Virtex FPGA Powers Signatec PDA16 High Speed Digitizer

The PDA16 high-speed digitizer, from Signatec Inc., is an advanced wideband and high dynamic range A/D boards with FPGA processing. Designed to meet demanding high-speed data acquisition, signal data recording and real-time FPGA processing applications, the PDA16 leverages the processing performance of Xilinx® Virtex FPGAs with embedded PowerPC processors. Signatec’s PDA16 is currently shipping.

With 512 MB of on-board memory configured as a large FIFO and a 64-bit PCI-X bus, Signatec’s PDA16 can continuously sustain up to two channels recording at 160 MSPS per channel and transfer the digitized and/or processed data to PC disk storage at rates up to 640 MB/s non-stop without any break in the analog record. Furthermore, the PDA16′s ultra-wide bandwidth capacity of up to 500 MHz allows users to accurately capture frequencies in baseband or in much higher-order Nyquist zones using under-sampling techniques.

The PDA16 comes with either a Virtex-4 FX20 (one immersed IBM PowerPC 405 processor) or an FX60 FPGA, (two immersed IBM PowerPC 405 processors). These industry standard processors offer high performance and a broad range of third-party support. Using the Virtex-4 FX FPGA’s Auxiliary Processor Unit (APU) controller, designers can simplify the integration of hardware accelerators and co-processors. The Virtex-4 FPGAs also come equipped with 12 to 16 RocketIO[tm] serial transceivers, each providing 622 Mbps to 6.5 Gbps, full duplex operation.

The PDA16 was designed to maximize the quality of captured signals in terms of signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) over a very wide frequency range. When utilizing the transformer-coupled inputs to the ADC, 100 dB SFDR performance levels for input frequencies over 100 MHz are obtainable and most input frequencies from 5 MHz to 200 MHz are 87 dB or better for SFDR.

Beyond its high-speed, multi-channel, high-resolution performance capabilities, the PDA16 offers users a very accurate synthesized clock to tune ADC sampling rates to any clock up to 125 MHz, and most other frequencies up to 160 MHz. This frequency selection flexibility comes at no cost to the acquisition clock quality/performance when locked to either the onboard 10 MHz, 5 PPM reference clock or to an externally provided 10 MHz reference clock.

This level of accurate clock tuning without sacrificing performance gives the best integrated onboard ADC clock flexibility in the industry. Users no longer need to settle for fixed clocks or limiting divide-by-2 clocks. This feature is ideal for undersampling applications, where the Nyquist bands need to be perfectly tuned to optimally place the center frequency of the sampled signal into the middle of the Nyquist zone and to optimize for the total bandwidth or data captured. In addition to the onboard clock capabilities, the ADC may also be clocked from an external clock source.

Up to four PDA16 boards may be interconnected in the standard Master/Slave configuration via a ribbon cable that connects at the top of the board. In this configuration, the clock and trigger signals from the master board drives the slave boards so that data sampling on all boards occurs simultaneously. Greater synchronization and scalability can be achieved with separate clock/trigger board modules that expand the synchronized clock and trigger signals to much higher counts allowing for up to 64 board systems.

More info: Signatec, Inc.