Verific’s HDL Fronts S2C’s FPGA Prototyping

Verific Design Automation announced that S2C Inc. adopted Verific Design Automation’s hardware description level (HDL) Component Software to serve as the register transfer level (RTL) front end for S2C’s newest line of field programmable gate array (FPGA)-based electronic system level (ESL) and system on chip (SoC) prototyping products.

S2C’s FPGA-based ESL solutions enable designers to access intellectual property in FPGA-based formats to assemble SoC prototypes and concurrently work on software development. S2C’s products include: TAI Pod, a hardware module that links FPGA prototypes to PC through a USB2.0 interface; TAI Player, a software application that automates compile flow and interfaces to TAI Pod for runtime, debugging, and security functions; and TAI Logic Module, a scalable rapid SoC prototyping module.

Verific’s HDL Component Software of SystemVerilog, Verilog and VHDL parsers, analyzers and elaborators has been integrated with S2C’s TAI Player and is used for exploring, navigating, analyzing, documenting and modifying large designs. Following Verific’s standard business model, S2C licenses the software as source code, and has access to Verific’s comprehensive online support and maintenance.

More info:
» S2C Adopts Verific’s HDL Component Software for FPGA Prototyping
» S2C
» Verific Design Automation