Mentor Graphics, GateRocket FPGA Verification Through Synthesis Flow

GateRocket teamed with Mentor Graphics to streamline the verification-through-synthesis flow for FPGA design. The integrated solution features GateRocket’s tool set for FPGA debug and verification with Mentor’s Precision Synthesis FPGA tool suite, which is a rad-tolerant synthesis-based solution. The Ssynthesis flow enables designers to more efficiently verify and debug high-reliability features such as synthesis-based triple modular redundancy (TMR) and compliance with safety-critical standards such as DO-254.

  • Ideal for safety-critical applications in military and aerospace markets
  • Enables a more efficient design flow for users of Mentor’s Precision Synthesis products
  • Includes the RocketDrive verification platform and RocketVision debug tool
  • Reduces excessive iterations through synthesis and place-and-route caused by unforeseen design errors introduced by IP blocks and downstream design flows
  • Enables the verification of the FPGA to be done by using the targeted FPGA itself in the RocketDrive system
  • Methodology reduces the number of synthesis-to-place-and-route iterations
  • More efficient approach to ensure circuits implementing high-reliability and safety-critical features are working properly and can be mapped error-free to the target FPGA device

More information: Mentor Graphics | GateRocket