Lattice Semiconductor Corporation (NASDAQ: LSCC) released an implementation of the uClinux Operating System (OS) targeted for its LatticeMico32(tm) embedded soft core processor. The new OS support allows developers to rapidly implement control systems in a design flow that builds on Lattice’s open source embedded solutions approach. It also complements the enhanced capabilities of the LatticeMico32 microprocessor core recently announced with the release of Lattice’s ispLEVER® version 7.0 SP2. New features include slave side arbitration for higher performance, enhanced peripheral support for improved integration and support of the LatticeMico32 system design tool flow under Linux.
The uClinux OS port to the LatticeMico32 offers a similar file system and the networking capabilities of Linux, but without an MMU. The port to the LatticeMico32 architecture (referred to as “lm32-nommu” by uClinux developers) is based on Linux2.6. To provide a complete solution, the port includes current versions of uClinux “userland” applications, U-Boot, uClib and uClinux-based user commands. Complete documentation is included with the port. Files needed for a demonstration on a LatticeECP2(tm) evaluation board are available with the release, including the project files required to recreate the demo and begin development. Lattice provides development support on uClinux and Lattice FPGAs through its online uClinux technical forum, as well as its normal applications technical support process.
Enhancements to the LatticeMico32 Embedded Processor System include support for slave-side bus arbitration for overall improvement in system performance by allowing multiple bus masters, such as a DMA controller and the LatticeMico32 microprocessor, to communicate concurrently to different slave devices. The Mico System tool chain is now supported on the Linux operating system, and includes support for integrating the LatticeMico32 microprocessor and other Verilog IP from Lattice into a VHDL design. Lattice provides a selection of IPexpress(tm)-compatible IP cores that are also available as peripherals to the LatticeMico32 microprocessor and are Mico System Builder ready. These IP cores, which include DDR, DDR2 and SDRAM memory controllers, a Tri-Speed Ethernet Media Access Controller and PCI 33MHz Target, among others, are automatically integrated into the Mico System Builder upon configuration in the IPexpress tool. Debug support has been enhanced with this release by the ability to daisy chain multiple designs, including the LatticeMico32 microprocessor, within the Reveal(tm) JTAG-based hardware debugger.
All files related to the uClinux port are available for download. For quick evaluation of uClinux on the LatticeECP2 FPGA, Lattice provides the “LatticeMico32/DSP Development Board for LatticeECP2,” which is used by the demo files supplied with the download. The board can be purchased for $695 from the Lattice online store. The LatticeMico32 and LatticeMico8 IP cores are offered by Lattice free of charge and along with their associated development tools.
More info: Lattice LatticeMico32 Soft Processor