The QuiXilica Titan-V5 VXS, from TEK Microsystems, is a 6U ANSI/VITA 41 (VXS) compliant high-speed digitizer board combining high density FPGA processing with four 12-bit A/D input channels at 1 GSPS (Gigasamples per second) and four 14-bit D/A output channels at 1.2 GSPS. By employing three Xilinx Virtex-5 FPGAs, Tekmicro’s Titan-V5 offers unmatched FPGA processing density per channel making it ideal for high channel count signal processing in applications. The Titan-V5 offers the highest bandwidth channel count per slot available for VXS products on the market. The balanced ADC/DAC of the Titan-V5 achieves the ultra low latency from acquisition to response that is critical for radar simulation, electronic warfare, and radar decoy applications.
Xilinx Virtex-5 FPGAs are the heart of the Titan-V5. The FPGAs interface between the ADC’s, memory and I/O resources to provide a platform for implementing high performance real time processing. The Titan-V5 is configured with two SX95T FPGAs and one LX110T FPGA. An LX220T, SX240T, or FX100T FPGA can be selected to match resources to the application. All FPGAs are interconnected by wide parallel LVDS busses and via high speed serial links using the Xilinx Rocket IO MGTs.
QuiXilica Titan-V5 VXS Features
- Eight Channels: Four 12-bit ADC Inputs at 1 GSPS each, Four 14-bit DAC Output at 1.2 GSPS each
- First COTS Product to Achieve This Level of Performance
- Sample Accurate Synchronization Across Multiple Boards
- ADC and DAC Can Use Common Clock
- Six Digital IO Channels Running at Up to 3.75 Gb/s Using One QSFP and Two SFP+ Front Panel Connections
- Dual 4x Full Duplex VXS Links and Two Full Duplex VITA 41.6 Ethernet Links
- Three Xilinx Virtex-5 FPGAs: LXT, SXT or FXT for Each Location
- Three GB DDR3 SDRAM Memory, (one GB per FPGA as 2, 512 MB, 64-bit banks)
- Advanced Temperature and Current Monitoring
- Comprehensive Developer’s Kit Provided Including FPGA Interface Cores, QuiXtart FPGA Utilities, Software and Reference Design
- Convection or Conduction Cooled
The Titan-V5 features four 1 GSPS analog input channels, four analog output channels of up to 1.2 GSPS and three Xilinx Virtex-5 FPGA’s, providing up to 2,336 DSP slices and 1.3 TeraMAC/s of signal processing. Titan-V5 transfers full sensor-rate data from the ADC processing (signal capture) to the DAC processing (waveform generation).
The ADC and DAC can use a common clock, which can be synchronized across multiple boards, or independent clocks, depending on the specific application requirements. The Titan-V5 features high bandwidth, low latency interconnect paths between its FPGAs. Synchronization of ADC and DAC sampling on a single board, and on multiple boards, is implemented using an external trigger signal.
The balanced architecture of the Titan-V5 and digital signal processing resources offers significant processing and “SWaP” advantages for a range of advanced processing algorithms and applications which previously would have required multiple cards to be utilized. Digital receiver applications, such as communication signal recovery and demodulation and STAP (Space Time Adaptive Processing), can be combined in the Titan-V5 with signal generation applications such as multi-channel communication response and jamming.
The Titan-V5 is available for a wide range of operating environments including commercial grade, rugged air, and conduction cooled to support deployed applications such as unmanned airborne, naval and ground vehicles. The Titan-V5 is available now with delivery from 10-12 weeks ARO.
More information: TEK Microsystems Titan-V5 VXS (pdf)