The QuiXilica V5 Architecture, from TEK Microsystems, is designed to meet the needs of demanding sensor-processing applications across a range of environments. The QuiXilica V5 architecture uses the latest field programmable gate array (FPGA) based processors – the Xilinx Virtex®-5 family, advanced DDR3 SDRAM, and the latest communications technologies available. Full ruggedization has been designed into the architecture from the outset to provide products suitable for harsh demanding environments and deployed systems. Products will be initially released in a 6U VITA 41.0 (VXS) format with other form factors to follow later in 2008.
The QuiXilica V5 Architecture uses three Xilinx Virtex-5 FPGAs, DDR3 SDRAM and the latest enhancements in flexible I/O communication modules (SFP+ and QSFP). Firmware and software support for a range of open standards and protocols is provided including Gigabit Ethernet, Serial FPDP (ANSI VITA 17.1 and 17.2) and Fibre Channel. For inter-FPGA and inter-board communications, other protocol support is provided such as Xilinx Aurora and PCI Express. A very broad range of analog sensor I/O configurations provide easy compatibility with the widest range of analog signal options, addressing multi-channel, high resolution sampled data requirements at 4 Gsps (Gigasamples per second) and beyond.
The QuiXilica V5 Architecture is the basis for a variety of digitizer boards in multiple form factors. Initial members of the QuiXilica V5 Family use three Xilinx Virtex-5 FPGAs to provide maximum high bandwidth processing and system configuration flexibility. Each FPGA has access to two banks of DDR3 SDRAM of 512 MB each (1 GB total per FPGA). The QuiXilica V5 Architecture products will support 2 GB and 4 GB per FPGA when larger memory devices are available for increased storage density and increased memory bandwidth. Memory and FPGAs have been combined and interconnected using multiple high bandwidth parallel and high-speed serial interconnections; thus data can be available within the processing chain as needed to meet a wide range of application requirements.
Inter-board and system communication requirements are met using either backplane connections or multiple front-panel high speed serial Quad Small Form-Factor Pluggable (QSFP) and Small Form-Factor Pluggable (SFP+) modules which provide eight and six high speed serial links respectively operating at up to 6.5 Gb/s. Utilizing the embedded communication functions as well as Tekmicro’s QuiXilica core and software library support (QuiXtream), the QuiXilica V5 Family supports the latest generation of Open Standard I/O protocols such as Gigabit Ethernet, Serial FPDP (ANSI VITA 17.1 & 17.2), PCI Express, Xilinx Aurora and Fibre Channel.
In addition to providing high performance, QuiXilica V5 digitizers have been designed for ruggedization and power management. The DDR3 SDRAM uses 17% less power than DDR2. QuiXilica V5 boards operate effectively in laboratory, rugged air-cooled, and rugged conduction-cooled environments to meet the needs of deployed applications.
TEK Microsystems provides superior QuiXilica FPGA cores and supporting firmware to minimize the effort required to extract maximum performance from the architecture, and to make development as easy as possible.
The Architecture’s common hardware interfaces and firmware /software development tools allow the user to easily migrate between platforms as different systems are developed, protecting the user’s investment both in their FPGA application and in integration and qualification of the QuiXilica V5 products in the target application.
The QuiXilica V5 Architecture provides a simple flexible parallel interface that enables boards to be factory configured with different ADCs and DACs, thus enabling the boards to meet a robust variety of applications. High bandwidth support for ADCs and DACs operating beyond 4 Gsps is designed into the architecture.
Analog Configuration Options
- 6 x 16 bit 160MSPS ADC & 1 x DAC channel
- 7 x 16 bit 500 MHz DAC channels
- 2 x 10 bit 2.2 GHz ADC channels
- 2x 12 bit 2.2 GHz DAC channels
- 1x 10 bit 2.2 GHz ADC channels with 1x 12 bit 2.2 GHz DAC channels
- 6 x 12 bit 500MHz ADC channels
- 2 x 8 bit 4GHz ADCs channels
More info: TEK Microsystems