CAST announced the H.264 Video Over IP – HD Encoder Subsystem. The reusable subsystem makes it easier to build video streaming into mobile and other products. Reference designs for the streaming subsystem are available now for the Altera Stratix IV and Arria V families, and the Xilinx Kintex-7 line. These include the CAST and other essential IP cores implemented in an FPGA, plus the necessary interfaces, memory, drivers, and software.
Barco Silex released the multi-channel Video over IP with JPEG 2000 reference design. The VoIP reference design integrates the BarcoSilex JPEG 2000 Encoder and Decoder IP Cores, the Barco Silex high-performance memory controller core, and the Xilinx SMPTE 2022-1/2 and Ethernet MAC LogiCORE IP Cores for Xilinx 7 Series FPGAs and Zynq All Programmable SoC.
Xilinx rolled out their SMPTE 2022-5/-6 intellectual property core. The core is ideal for developing internet protocol based systems needed to reduce the cost of transporting raw, high-bit video from remote events, to studios, to post editing houses, and other points along the production process. The Xilinx SMPTE 2022-5/-6 intellectual property core is available now through early access. The core will be available as a Xilinx LogiCORE IP core in the first quarter of 2012.
Xilinx will take part in IBC 2011. The company will demonstrate programmable platforms that assist broadcast equipment makers in building systems capable of delivering content over traditional SD/HD/3G-SDI and AES3 connections as well as bridging to video over IP networks whilst maintaining highest possible video quality. IBC 2011 will take September 8-13 in Amsterdam.