Tag Archives: Serial

Lattice Semiconductor Debuts Serial sub-LVDS Bridge Design for Sony IMX136, IMX104 Image Sensors

Lattice Semiconductor serial sub-LVDS bridge reference design for the Sony IMX136 and IMX104 image sensors

Lattice Semiconductor introduced a serial sub-LVDS bridge reference design for the Sony IMX136 and IMX104 image sensors. Lattice’s image sensor bridge design helps engineers quickly introduce cameras based on the Sony IMX136 and IMX104. The image sensor bridge design is available now for download, and the MachXO2-1200 (featured in the reference design) is in full production.

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Xilinx Virtex-6 HXT FPGA Devices

Xilinx Virtex-6 HXT FPGA devices support 40Gbps and 100Gbps line cards with flexible port configurations including 1x40Gbps, 4x10Gbps, 1x100Gbps and 10x10Gbps. Virtex-6 HXT FPGAs offer the industry’s highest serial bandwidth through a combination of 6.6Gbps GTX transceivers and 11.18Gbps GTH transceivers. Virtex-6 HXT FPGA devices support the optical requirements of next generation communications equipment without the need for external re-timer circuitry through transceiver jitter performance. Virtex-6 HXT FPGAs are shipping now. Engineers can start their designs immediately with the ISE Design Suite version 12.3. The devices are ideal for packet and transport, switch fabric, video switching, and imaging equipment.

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Xilinx Extensible Processing Platform for Embedded Systems

Xilinx announced the architecture for a new Extensible Processing Platform for embedded systems. The ARM Cortex-A9 MPCore processor-based platform enables system architects and embedded software developers to apply a combination of serial and parallel processing for embedded systems to perform complex functions. Xilinx’s new architecture abstracts much of the hardware burden away from the embedded software developers’ point of view and gives them more control in the development process.

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Altera Serial RapidIO Intellectual Property Core for RapidIO 2.1

Altera introduced their Serial RapidIO intellectual property (IP) core for the RapidIO 2.1 specification. Altera’s Serial RapidIO IP core supports up to four lanes at 5.0 GBaud per lane, addressing the increased bandwidth and reliability needs of the wireless and military markets. The IP core is optimized for Stratix IV FPGAs with embedded transceivers and is supported within Quartus II software v9.1.

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Altera Cyclone IV FPGA Family

Altera introduced the Cyclone IV FPGA family. The Cyclone IV FPGA family supports mainstream serial protocols while offering low cost, low power, and a rich supply of logic, memory and DSP capabilities. The EP4CGX15 and EP4C115E, the first Cyclone IV GX and Cyclone IV E devices respectively, will ship in the first quarter of 2010. Budgetary pricing for the smallest devices, the EP4CE6 and the EP4CGX15, will start as low as $3 and $6 respectively for 250K unit quantities in 2010. the FPGAs are ideal for high-volume, cost-sensitive applications.

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