Tag Archives: SERDES

ADI Unveils FMC176 Quad Channel ADC and Dual Channel DAC FPGA Mezzanine Card

Analog Devices announced the FMC176 quad channel ADC and dual channel DAC FPGA mezzanine card

Analog Devices announced the FMC176 quad channel ADC and dual channel DAC FPGA mezzanine card. The FMC176 features JEDEC JESD204B serializer/de-serializer (SerDes) technology. It enables digital and analog designers to simplify high-speed data converter-to-FPGA connectivity. The ADI FMC features two AD9250, dual-channel, 14-bit, 250-MSPS A/D converters with JESD204B-compatible serial output data interface and two AD9129 dual 16-bit 5.6-GSPS RF D/A converters. It is available now for $2995.

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Quantum Channel Designer Design Kits and IBIS-AMI Models for Altera FPGA

Signal Integrity Software (SiSoft) rolled out IBIS-AMI models for Altera’s Stratix IV GT, Stratix IV GX and Arria II GX FPGA devices. The models simulate the complex circuit components in Altera’s field programmable gate arrays. Quantum Channel Designer design kits are also available for Altera’s Stratix IV GX, Stratix IV GT and Arria II GX devices. QCD Design Kits provide complete, ready-to-run simulation setups for a given vendor and device model.

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Reference Clock Solution for SERDES Applications

Lattice Semiconductor and Epson Toyocom teamed together on a low-cost reference clock solution for SERDES applications. The reference design features Lattice’s ispClock 5400D device and Epson Toyocom’s SG-710ECK CMOS oscillator. The 6-output ispClock5406D device is available for $2.95 in 10K piece volumes. The Epson Toyocom SG-710 is available for $0.95 in quantities of 10K piece volumes. The reference clock solution is ideal for designers who need a low cost reference clock for SERDES applications such as XAUI or SDI Video.

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