Reflex CES introduced their FPGA Aurora-like 64B/66B IP core. The new IP assures interoperability between all leading FPGAs, whatever the performance of their backplanes and systems, from 1 to 14Gbps, and whatever the generic or configurable features incorporated. The Reflex CES Aurora-like 64B/66B IP Cores are available with encrypted or VHDL source code license agreements, encrypted test-benches, reference designs and a user guide.
Reflex CES’ FPP25 FPGA prototyping platform is based on three high-density Xilinx Virtex-7 2000T FPGA devices and Wasga FPGA partitioning software from FLEXRAS. The fast ASIC/SOC prototyping platform features automatic partitioning for emulating designs of up to 25-million ASIC gates using a stand-alone system. It helps design engineers speed up validation and verification of complex, high-density digital designs.
Reflex CES (Custom Embedded Systems) introduced the Aurora-like IP core. It is based on Altera FPGA devices. The Reflex CES IP core enables interoperability between Xilinx Virtex-6 LXT and Altera Stratix IV and Stratix V GX FPGAs. The Reflex CES Aurora-like 8B/10B IP Core is available now with VHDL source code, test-benches, a reference design and user guide. Reflex CES plans to ship an Aurora-like IP Core that supports communication between FPGAs with a 64B/66B protocol at 10 Gbps.