Tag Archives: Quartus II

Altera to Host FPGA Related Seminars in September

Altera is hosting a series of FPGA related seminars in September. The training will take place in cities across the US and Canada. The classes are:

  • Designing with an ARM-based SoC
  • Developing Software for an ARM-based SoC
  • Parallel Computing with OpenCL Workshop
  • Advanced Timing Analysis with TimeQuest
  • Timing Closure with the Quartus II Software
  • Introduction to the Qsys System Integration Tool
  • Advanced Qsys System Integration Tool Methodologies

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Plunify Takes Altera Quartus II FPGA Tools to the Cloud

Plunify cloud platform for Quartus II tools

Plunify introduced the Altera Quartus II cloud platform for designing with Stratix, Cyclone and Arria FPGA devices. The cloud tool helps FPGA designers to accelerate chip design workflows, and save time and money in the process. Quartus II is an easy-to-use software platform for programmable logic design. The new relationship with Altera marks the production availability of Plunify’s cloud based solution for FPGA design.

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Create Fastest FPGA Designs with Altera Quartus II Software v13.0

Altera Quartus II software v13.0

Altera released version 13.0 of their Quartus II software. Quartus II v13 enables designs targeting Stratix V FPGAs to achieve the fastest Fmax of any FPGA in the industry with a two speed-grade advantage over the nearest competitor. Both the Subscription Edition and the free Web Edition of Quartus II software v13.0 are now available for download.

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Altera Arria V GZ FPGA Increases Performance by 30%

Altera Arria V FPGA

Altera recently launched their Arria V GZ FPGA. The transceiver variant offers an overall core performance boost of more than two speed grades, which translates to a 30% increase. The Arria V GZ variant provides both the high-speed serial transceivers and the external memory capability that designers need to build bandwidth-hungry data processing systems. Altera Arria V GZ FPGAs are available now and are supported in Quartus II software v12.1.

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Altera Launches Quartus II Software Version 12.0, Now Four Times Faster

Altera Quartus II Software Version 12.0

Altera rolled out version 12 of their Quartus II development software for FPGA design. Quartus II software v12.0 offers faster compile times (up to four times faster), expanded device support (such as Altera’s SoC FPGAs), enhanced Qsys system integration and DSP Builder tools, and improved intellectual property (IP) core offerings. The Subscription Edition and the free Web Edition of Quartus II software version 12.0 are now available for download. The annual software subscription costs $2,995 for a node-locked PC license.

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Altera Quartus II Software Version 11.1

Altera rolled out version 11.1 of their Quartus II design software for CPLD, FPGA and HardCopy ASIC designs. Quartus II software version 11.1 includes expanded support for Altera’s 28nm FPGAs, including compilation support for Arria V and Cyclone V FPGAs and enhanced support for Stratix V FPGAs. Both the Subscription Edition and the free Web Edition of Quartus II software version 11.1 are now available for download.

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Altera Quartus II Software v11.0

Altera launched version 11 of their Quartus II software for CPLD, FPGA and HardCopy ASIC designs. Quartus II v11 features the Qsys, expanded support for the Stratix V FPGA family, faster board bring-up, new performance monitoring capabilities in the external memory interface toolkit and improved usability with the Transceiver Toolkit. Both the Subscription Edition and the free Web Edition of Quartus II software version 11.0 are now available. Subscribers receive Quartus II software, the ModelSim-Altera Starter edition and a full license to the IP Base Suite. The annual software subscription is $2,995 for a node-locked PC license.

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Altera Qsys System Integration Tool

Altera’s Qsys is a system-integration tool for FPGA designers. Qsys automatically generating interconnect logic to connect intellectual property (IP) functions and subsystems. Qsys features the industry’s first FPGA-optimized network-on-chip-based interconnect. Qsys offers memory-mapped and streaming interface support that achieves nearly double the performance of Altera’s SOPC Builder tool, while improving system scalability for large FPGA designs and enabling support for industry-standard interfaces (Avalon and AMBA AXI and AHB standards from ARM, etc). A beta release of Qsys is available in Quartus II Subscription Edition software v10.1

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Altera Quartus II Software v10.1

Altera rolled out version 10.1 of the Quartus II development software for CPLD, FPGA and HardCopy ASIC design. The Quartus II Subscription Edition software version 10.1 features the beta version of Qsys, which is Altera’s next-generation system-integration tool. Both the Subscription Edition and the free Web Edition of Quartus II software v10.1 are now available for download. A beta version of Qsys is available in the Quartus II Subscription Edition software.

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Altera Quartus II Software Version 10.0 for CPLD, FPGA, HardCopy ASIC

Altera announced version 10.0 of their Quartus II development software for CPLD, FPGA and HardCopy ASIC designs. Quartus II software v10.0 features 2X to 3X faster compile times than the nearest competitor for high-density designs. The latest software release includes support for Altera’s 28-nm Stratix V FPGA family and offers several new productivity features that enable design teams to achieve faster timing closure and shorten time to market. Both the Subscription Edition and the free Web Edition of Quartus II software v10.0 are now available for download.

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