Tag Archives: Qsys

Altera to Host FPGA Related Seminars in September

Altera is hosting a series of FPGA related seminars in September. The training will take place in cities across the US and Canada. The classes are:

  • Designing with an ARM-based SoC
  • Developing Software for an ARM-based SoC
  • Parallel Computing with OpenCL Workshop
  • Advanced Timing Analysis with TimeQuest
  • Timing Closure with the Quartus II Software
  • Introduction to the Qsys System Integration Tool
  • Advanced Qsys System Integration Tool Methodologies

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Altera Launches Quartus II Software Version 12.0, Now Four Times Faster

Altera Quartus II Software Version 12.0

Altera rolled out version 12 of their Quartus II development software for FPGA design. Quartus II software v12.0 offers faster compile times (up to four times faster), expanded device support (such as Altera’s SoC FPGAs), enhanced Qsys system integration and DSP Builder tools, and improved intellectual property (IP) core offerings. The Subscription Edition and the free Web Edition of Quartus II software version 12.0 are now available for download. The annual software subscription costs $2,995 for a node-locked PC license.

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Altera Quartus II Software v11.0

Altera launched version 11 of their Quartus II software for CPLD, FPGA and HardCopy ASIC designs. Quartus II v11 features the Qsys, expanded support for the Stratix V FPGA family, faster board bring-up, new performance monitoring capabilities in the external memory interface toolkit and improved usability with the Transceiver Toolkit. Both the Subscription Edition and the free Web Edition of Quartus II software version 11.0 are now available. Subscribers receive Quartus II software, the ModelSim-Altera Starter edition and a full license to the IP Base Suite. The annual software subscription is $2,995 for a node-locked PC license.

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Altera Qsys System Integration Tool

Altera’s Qsys is a system-integration tool for FPGA designers. Qsys automatically generating interconnect logic to connect intellectual property (IP) functions and subsystems. Qsys features the industry’s first FPGA-optimized network-on-chip-based interconnect. Qsys offers memory-mapped and streaming interface support that achieves nearly double the performance of Altera’s SOPC Builder tool, while improving system scalability for large FPGA designs and enabling support for industry-standard interfaces (Avalon and AMBA AXI and AHB standards from ARM, etc). A beta release of Qsys is available in Quartus II Subscription Edition software v10.1

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Altera Quartus II Software v10.1

Altera rolled out version 10.1 of the Quartus II development software for CPLD, FPGA and HardCopy ASIC design. The Quartus II Subscription Edition software version 10.1 features the beta version of Qsys, which is Altera’s next-generation system-integration tool. Both the Subscription Edition and the free Web Edition of Quartus II software v10.1 are now available for download. A beta version of Qsys is available in the Quartus II Subscription Edition software.

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