Microsemi introduced the IGLOO2 FPGA Evaluation Kit. The low-cost kit is a PCI Express (PCIe) compliant form factor evaluation platform. The IGLOO2 FPGA Evaluation Kit is available now for an introductory price of $99 (for the first 1,000 orders). The kit includes Microsemi’s Libero SoC Gold Software License for designing with Microsemi FPGAs and SoC FPGAs.
The XpressV7-LP is PLDA’s latest FPGA design kit. The XpressV7-LP features a FPGA-based low-profile PCI Express form factor card with 40Gb of Ethernet connectivity and 8 GBytes of DDR3 SDRAM. The FPGA kit is delivered with PLDA’s PCIe 3.0 IP and optional 10G UDP/TCP stack IP, specifically optimized for the Xilinx Virtex-7 FPGA. The PLDA XpressV7-LP FPGA Design Kit will ship in October.
Innovative Integration recently introduced their X6-250M XMC module. The X6-250M features a Xilinx Virtex-6 FPGA signal processing core, XMC and PCI interfaces, and eight simultaneously sampling A/D channels. The X6-250M XMC module from Innovative Integration is ideal for software defined radio, RADAR receivers, and multi-channel data recorders.
Xilinx introduced their Kintex-7 FPGA Connectivity Kit for creating serial I/O designs. The new Xilinx kit helps increase productivity by offering a Targeted Reference Design that reduces tedious. The reference design integrates an entire PCIe solution with DDR3 sub-system, including both the HDL and the complete software stack. It can be used in production systems or as a proven base for custom modifications. The Xilinx Kintex-7 FPGA Connectivity Kit is available now for $2895.
PLDA introduced their XpressGX5LP FPGA design kit. It is the first FPGA-based low-profile PCI Express form factor card featuring 40Gb of Ethernet connectivity and 8 GBytes of DDR3 SDRAM. It is delivered with PLDA’s PCIe 3.0 IP and full hardware 10G TCP stack IP, specifically optimized for the Altera Stratix V FPGA. The PLDA XpressGX5LP is shipping now and will available for volume orders in Q3 2012.
Altera will be presenting, demonstrating, and showcasing at the Flash Memory Summit 2011. Altera will show how their FPGA devices enable new applications, including support for major interfaces used in flash memory applications such as multichannel ONFI and Toggle Mode, DDR3 memory, SAS/SATA protocols and the latest generation PCI Express (PCIe). The Flash Memory Summit 2011 will take place Tuesday, August 9 to Thursday, August 11, 2011 in Santa Clara, California.
According to Lattice Semiconductor, their solution is interoperable with existing PCIe 2.0 supported systems. At a recent PCI-SIG workshop, the LatticeECP3 FPGA and its PCI Express (PCIe) IP core passed PCI-SIG PCIe v2.0 compliance and interoperability testing for 1- and 4-lane configurations. As a result, the LatticeECP3 FPGA family is now compliant with the PCI Express 2.0 specification at 2.5Gbps. Lattice also worked with Trellisys on a PCIe Bus Functional Model (BFM) for Lattice’s PCI Express x1 and x4 IP Cores.
Acromag announced their VPX-VLX series of 3U VPX FPGA boards. The VPX-VLX features a Xilinx VLX85T, VLX110T, or VLX155T FPGA. The Xilinx Virtex-5 FPGA has been enhanced with multiple high-speed memory buffers and a high-throughput PCIe interface. The cards are available in a format designed for use in air-cooled or conduction-cooled systems suitable for -40 to 85°C operation. The Acromag modules start at $7100 with several options for FPGA logic capacity and conduction-cooled extended temperature operation.
CAST announced their PCIEXPAIF IP Core for integrating PCI Express in an FPGA-based system. The IP core includes a high-level interface between system buses like AMBA AXI4 and the PCI Express hard macro blocks available from Altera and Xilinx. The PCIEXPAIF IP Core integrates a completer controller and DMA controller with up to eight DMA channels. The functionality of the DMA controller can be extended using the Scatter-Gather controller. The CAST core supports 32- and 64-bit versions of the open source Wishbone Bus and the AMBA AHB, AXI and AXI4 buses.
PLDA introduced the XpressRich3 IP core for FPGAs and ASICs based on the forthcoming PCIe 3.0 specification, currently under development within the PCI-SIG. The PLDA XpressRich3 core features an architecture that seamlessly allows both ASIC and FPGA implementations. The PLDA XpressRich3 IP will be available for review at the PCI-SIG Developers Conference, which will be held on June 23-24, 2010 in Santa Clara, California.