Microsemi introduced the IGLOO2 FPGA Evaluation Kit. The low-cost kit is a PCI Express (PCIe) compliant form factor evaluation platform. The IGLOO2 FPGA Evaluation Kit is available now for an introductory price of $99 (for the first 1,000 orders). The kit includes Microsemi’s Libero SoC Gold Software License for designing with Microsemi FPGAs and SoC FPGAs.
Microsemi introduced System Builder design tool for the SmartFusion2 SoC FPGA devices. The System Builder tool simplifies the design process for Microsemi’s SmartFusion2 SoC FPGAs in embedded system applications. With System Builder, designers can quickly and easily define the desired system architecture via a high-level step-by-step process.
Microsemi launched their IGLOO2 field programmable gate array family. The new FPGA devices are ideal for industrial, commercial aviation, defense, communications and security applications. Pricing for IGLOO2 starts at less than $7 for high volume orders. The M2GL050 is shipping in volume production now with subsequent device configurations rolling out throughout 2013 and early 2014. IGLOO2 FPGAs will be available in extended temperature offerings of up to 125 degrees centigrade temperature junction.
Microsemi has achieved National Institute of Standards and Technology (NIST) algorithmic certification on their U.S.-developed EnforcIT Cryptography Suite of National Security Agency (NSA) Suite B algorithms. The EnforcIT Cryptography Suite was validated by InfoGard Laboratories, Inc. and certified by the NIST. The certification is expected to be posted to the NIST website later this month.
Microsemi will host a webinar on single event upset (SEU). Attendees will learn about the risks and consequences of configuration failures in Flash, Antifuse and SRAM FPGA technologies, as well as background information on the physical failure mechanisms associated with SEUs. The webcast is titled SEU Immunity: Is Your Design Really Safe? The online seminar will take place Wednesday, April 17 at 8 am PDT.
Microsemi introduced the SmartFusion2 SoC FPGA Starter Kit. The tool offers engineers a prototyping platform for the Microsemi SmartFusion2 system-on-chip (SoC) field programmable gate arrays (FPGAs). The kit supports interfaces like Ethernet, USB, SPI, I2C and UART. It includes a comprehensive breadboard to support unique design requirements.
Avnet Memec announced a new series of Microsemi SpeedWay Design Workshops. The focus of the events is the new Microsemi SmartFusion2 SoC FPGAs. The workshops will be held in 26 cities throughout North America. The first workshops will take place on February 19th in San Jose and Philadelphia. The cost of the one-day workshops is $99 per person. Each attendee will receive a SmartFusion2 Starter Kit ($299 value).
Microsemi introduced the SmartFusion2 system-on-chip field programmable gate array family. The device features flash-based FPGA fabric, a 166 megahertz (MHz) ARM Cortex-M3 processor, advanced security processing accelerators, DSP blocks, SRAM, eNVM and high-performance communication interfaces. The SmartFusion2 SoC FPGA is ideal for safety-critical applications in industrial, defense, aviation, communications and medical applications. The SmartFusion2 M2S050T samples are available now. First production silicon is expected in early 2013.
Microsemi’s RTAX-S/SL field programmable gate arrays have received QML Class V qualification. The U.S. Defense Logistics Agency (DLA) qualified the FPGA as Qualified Manufacturers List Class V in accordance with military performance standard MIL-PRF-38535 space-level qualification requirements. QML Class V is the highest standard in the industry for space integrated circuits. Microsemi radiation-tolerant RTAX-S/SL FPGAs are ideal for space-flight systems. They feature high performance, low power, single-chip form factor and live-at-power-up operation.
Microsemi recently introduced a LCD display reference design for industrial and medical applications. The reference design is based on the SmartFusion customizable system-on-chip. The SmartFusion cSoC integrates FPGA technology with a hardened ARM Cortex-M3 processor and programmable analog blocks. The SmartFusion display reference design source files and user’s guide are available now.