Altera and Micron Technology have successfully demonstrated interoperability between Altera Stratix V FPGAs and Micron’s Hybrid Memory Cube (HMC). This technology achievement enables system designers to evaluate today the benefits of HMC with FPGAs and SoCs for next-generation communications and high-performance computing designs. The demonstration provides an early proof point that production support of HMC will be delivered with Altera’s Generation 10 portfolio — includes both Stratix 10 and Arria 10 FPGAs and SoCs.
Altera have optimized their Stratix V FPGA devices to support Micron Technology’s reduced-latency DRAM (RLDRAM 3 memory). The changes made to the Stratix V memory architecture make the memory interface ideal for high performance networking applications. RLDRAM 3 memory is designed to meet the requirements of high-bandwidth networking applications and enable a faster, more efficient transfer of data over the network.