Tag Archives: JTAG

eBook: Testing System Clocks with Boundary Scan (JTAG) and an FPGA

Testing System Clocks with Boundary Scan (JTAG) and an FPGA

ASSET InterTech published a new ebook that explains how cost-effective verification of system clocks during prototype circuit board bring-up and manufacturing can be accomplished with several different methods based on JTAG and boundary-scan testing or IP in an FPGA. The title of the ebook is Testing System Clocks with Boundary Scan (JTAG) and an FPGA.

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eBook: At-Speed SPI Flash/EEPROM Programming Using FPGA and JTAG

At-Speed SPI Flash/EEPROM Programming Using FPGA and JTAG

ASSET InterTech published a new ebook about the pros and cons of several different methods for programming memory devices connected to the Serial Peripheral Interface (SPI) bus. Each method takes advantage of a Field Programmable Gate Array (FPGA) that is already on the board for functional purposes. The title of the technical article is At-Speed SPI Flash/EEPROM Programming Using FPGA and JTAG.

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