Reflex CES introduced their FPGA Aurora-like 64B/66B IP core. The new IP assures interoperability between all leading FPGAs, whatever the performance of their backplanes and systems, from 1 to 14Gbps, and whatever the generic or configurable features incorporated. The Reflex CES Aurora-like 64B/66B IP Cores are available with encrypted or VHDL source code license agreements, encrypted test-benches, reference designs and a user guide.
Xilinx’s 7 Series GTH transceiver has successfully completed testing for 10GBASE-KR LogiCORE IP core. The test was conducted at the University of New Hampshire InterOperability Laboratory. The test validated that the IP fully meets UNH-IOL’s receiver (Rx) and transmitter (Tx) electrical and protocol compliance tests for backplane applications. The 10GBASE-KR LogiCORE IP is currently available in the Vivado Design Suite.
Xilinx introduced their Gigabit class 1024QAM point-to-point (PtP) microwave modem IP for backhaul applications. The 1024QAM modem intellectual property enables OEMs to develop generation ahead backhaul platforms with exceptional bandwidth capacity, low latency and low power. The 1024QAM microwave modem IP core is available now for select customers. General availability is expected by May 2013.
Beyond Semiconductor and CAST announced the BA25 Advanced Application Processor. It is the latest member of the BA2x family of 32-bit processor IP cores. The BA25 Advanced Application Processor Core is available now and is already in use by early customers. The IP core is ideal for demanding embedded applications. It is suitable for use as the main processor for systems running general-purpose operating systems like Linux or Android.
Reflex CES (Custom Embedded Systems) introduced the Aurora-like IP core. It is based on Altera FPGA devices. The Reflex CES IP core enables interoperability between Xilinx Virtex-6 LXT and Altera Stratix IV and Stratix V GX FPGAs. The Reflex CES Aurora-like 8B/10B IP Core is available now with VHDL source code, test-benches, a reference design and user guide. Reflex CES plans to ship an Aurora-like IP Core that supports communication between FPGAs with a 64B/66B protocol at 10 Gbps.
CAST announced the H264-HP-E video encoder IP core. The ISO/IEC 14496-10 and ITU-T H.264 High Profile specification compliant H264-HP-E video encoder IP core is sourced from Alma Technologies. It is available now and is ideal for HD broadcast, professional video cameras, and video storage. An intra-only version features extremely low latency for real-time applications, and is suitable for AVC-Intra 50 and 100 implementations.
Xilinx introduced their fourth generation secure architecture with Information Assurance and Anti-Tamper IP core support for defense-grade 7 series FPGA devices and Zynq-7000 All Programmable system-on-chips. In addition to the secure capabilities, the defense-grade 7 series FPGAs and Zynq-7000 All Programmable SoCs offer mask set control, ruggedized packaging with fully-leaded (Pb) content for harsh environmental operation, full extended temperature range testing, long term availability and anti-counterfeiting features.
PLDA introduced their QuickUDP, which is a 10Gb UDP Hardware stack IP core for FPGA devices. The QuickUDP IP solution is a 100% RTL-designed IP, compliant with the IEEE802.3 specification and supports the ARP, IPv4, ICMP, IGMP, and UDP protocols. The PLDA QuickUDP 10G UDP Hardware Stack IP is available now from PLDA. The PLDA QuickUDP can be integrated into Altera-based and Xilinx-based FPGA designs.
Vanguard Software Solutions introduced their AVC-I encoder and decoder core for FPGA devices. A SVC codec core will be available in the fourth quarter. In addition, VSS is also developing a new HEVC FPGA core that will be available next year. The HEVC core will provide customers with access to real-time, HEVC functionality with FPGA flexibility.
PLDA recently introduced their QuickTCP IP, which is a 10Gb TCP/IP Hardware stack IP core. It features an AMBA AXI4 user interface that enables instant integration into either Altera-based or Xilinx-based FPGA designs. PLDA QuickTCP is a 100% RTL designed IP. It is compliant with the IEEE802.3 specification and supporting the ARP, IPv4, ICMP, and TCP protocols. The PLDA QuickTCP IP solution is available now from PLDA.