Altera introduced a direct memory access (DMA) reference design. The solution is constructed for Stratix V customers needing to seamlessly and quickly design PCIe Gen3 solutions. Stratix V GX FPGAs feature a hardened protocol stack for PCIe Gen3 applications, demanding the highest in bandwidth, system integration and flexibility, at a reduced cost with lower total power consumption. The new DMA reference design makes it fast and easy to develop high-performance PCIe Gen3x8 hardware.
The PLDA’s EZDMA IP is a DMA solution. The IP features a vendor-agnostic user interface and seamless device migration. It is configurable for resource optimization and customizable to fit specific customer requirements. The PLDA EZDMA solution supports the Aldec Riviera-PRO for Linux and Active-HDL for Windows verification tools for FPGA development. PLDA’s EZDMA IP solution is available now for PCI Express Gen1 and Gen2 designs.