Tag Archives: Decoder

Barco Silex Debuts Multi-channel Video over IP with JPEG 2000 Reference Design

Barco Silex multi-channel Video over IP with JPEG 2000 reference design

Barco Silex released the multi-channel Video over IP with JPEG 2000 reference design. The VoIP reference design integrates the BarcoSilex JPEG 2000 Encoder and Decoder IP Cores, the Barco Silex high-performance memory controller core, and the Xilinx SMPTE 2022-1/2 and Ethernet MAC LogiCORE IP Cores for Xilinx 7 Series FPGAs and Zynq All Programmable SoC.

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Vanguard Software Solutions Debuts AVC-I Encoder and Decoder Core for FPGA Devices

Vanguard Software Solutions introduced their AVC-I encoder and decoder core for FPGA devices. A SVC codec core will be available in the fourth quarter. In addition, VSS is also developing a new HEVC FPGA core that will be available next year. The HEVC core will provide customers with access to real-time, HEVC functionality with FPGA flexibility.

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NTT Decoder LSI FPGA for 10-bit 4:2:2 H.264 and MPEG-2

NTT Electronics has developed a FPGA version of a multi-standard single chip LSI for both H.264/AVC 4:2:2 10-bit (including AVC-Intra 100/50) and MPEG-2 4:2:2 decoding. The 1080p 60 FPGA version will be released in the first quarter of 2011. By 2012, NTT Electronics expects to have over 10 models of next-generation H.264/AVC encoder/decoder LSIs.

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Silicon Image CineramIC 4K and 3D H.264 Digital Video Decoder IP Core

Silicon Image introduced the cineramIC 4K and 3D H.264 digital video decoder IP core. With its high performance, low cost and high-quality video imaging, the cineramIC IP core can be integrated into System-on-Chips (SoCs) for next-generation digital TV (DTV), set-top-box (STB) and camcorder applications, as well as professional video editing, broadcast, medical, and surveillance FPGA applications.

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