Tag Archives: ARM

Altera to Host FPGA Related Seminars in September

Altera is hosting a series of FPGA related seminars in September. The training will take place in cities across the US and Canada. The classes are:

  • Designing with an ARM-based SoC
  • Developing Software for an ARM-based SoC
  • Parallel Computing with OpenCL Workshop
  • Advanced Timing Analysis with TimeQuest
  • Timing Closure with the Quartus II Software
  • Introduction to the Qsys System Integration Tool
  • Advanced Qsys System Integration Tool Methodologies

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Microsemi System Builder Simplifies Design Process for SmartFusion2 SoC FPGA

Microsemi introduced System Builder design tool for the SmartFusion2 SoC FPGA devices. The System Builder tool simplifies the design process for Microsemi’s SmartFusion2 SoC FPGAs in embedded system applications. With System Builder, designers can quickly and easily define the desired system architecture via a high-level step-by-step process.

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ARM Development Studio 5 Altera Edition Toolkit for Embedded Software Development

ARM Development Studio 5 (DS-5) Altera Edition toolkit

Altera and ARM have developed a DS-5 embedded software development toolkit with FPGA-adaptive debug capabilities for Altera SoC devices. The ARM Development Studio 5 (DS-5) Altera Edition toolkit is designed to remove the debugging barrier between the integrated dual-core CPU subsystem and FPGA fabric in Altera SoC devices. The toolkit will be included in the Altera SoC Embedded Design Suite (Altera SoC EDS) Subscription Edition for $995. It will start shipping in early 2013.

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Microsemi Introduces SmartFusion LCD Display Reference Design

Microsemi recently introduced a LCD display reference design for industrial and medical applications. The reference design is based on the SmartFusion customizable system-on-chip. The SmartFusion cSoC integrates FPGA technology with a hardened ARM Cortex-M3 processor and programmable analog blocks. The SmartFusion display reference design source files and user’s guide are available now.

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Micro/sys SBC1651 Single Board Computer Features Spartan-6 FPGA

The new Micro/sys SBC1651 COTS single-board computer features an integrated Xilinx Spartan-6 FPGA with MicroBlaze processor sub-system and ARM Cortex-A8 processor. The on-board FPGA adds I/O flexibility to the SBC. The Micro/sys SBC1651 enables OEMs to efficiently configure boards to exact I/O requirements. The PC/104-sized board is ideal for automation, medical, transportation, energy, military, and communications. Pricing for the Micro/sys SBC1651 starts at $595 in single quantity and about $350 in OEM quantities.

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Xilinx Zynq-7000 Extensible Processing Platform

Xilinx introduced the Zynq-7000 Extensible Processing Platform (EPP). The family consists of the Zynq-7010, Zynq-7020, Zynq-7030 and Zynq-7040 devices. The Zynq-7000 family combines an ARM Cortex-A9 MPCore processor-based system with 28nm, low-power programmable logic. The first silicon devices will be available in the second half of 2011. Engineering samples are expected in the first half of 2012. The Zynq-7000 family will have an entry point of below $15 in high volumes. The Zynq-7000 EPP family is ideal for video surveillance, automotive driver assistance, factory automation, and other embedded applications.

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Creating FPGA-based Co-Processors for DSPs Using Model Based Design

Avnet Electronics, MathWorks, Texas Instruments (TI), and Xilinx are offering a new series of SpeedWay Design Workshops. The hands-on training sessions will focus on designing co-processing solutions with TI’s DSP + ARM OMAP-L138 processors, Xilinx Spartan-6 FPGAs and MathWorks Simulink Model-Based design tools. Course materials and lab work will be based on the newly released Avnet Spartan-6 FPGA/OMAP-L138 Co-Processing DSP Kit. The workshops will take place next month throughout North America. The three-day workshops are $695 per person.

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The Altera Embedded Initiative

Altera introduced their Embedded Initiative, which will give designers a single FPGA design flow based on the Quartus II development software. The design flow features the Qsys system-level integration tool, a common FPGA intellectual property (IP) library, and the ARM Cortex-A9 MPCore and MIPS Technologies MIPS32 embedded processors. The Qsys system-level integration tool leverages FPGA-optimized network-on-a-chip technology to support a wide variety of industry-standard IP protocols.

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Actel SmartFusion A2F500 FPGA Device

The Actel SmartFusion A2F500 FPGA devices feature 500,000 system gates, a hard 100 MHz 32-bit ARM Cortex-M3-based microcontroller subsystem with 512 Kbytes of embedded flash and 64 Kbytes of embedded SRAM, programmable analog, three ADCs, three DACs, and ten comparators. SmartFusion A2F500 devices are offered in FG256 and FG484 leaded and lead-free ROHS-compliant packages. These products are offered in commercial and industrial temperature grades and are now available in volume production. The Actel A2F500 FPGA device is idea for system management, motor control, and industrial automation applications.

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