Synfora announced version 9.04 of their PICO Extreme and PICO Extreme FPGA C synthesis tools with enhanced support for C++ language constructs and new support for additional FPGA devices. Now users of FPGA and SOC devices can gain the productivity advantages of a C/C++ based design methodology for video, imaging, and wireless applications. Version 9.04 of PICO Extreme FPGA and PICO Extreme are available now.
The PICO Extreme product line now offers additional C++ support, including support for classes, templates, and operator over-loading; host interface and memory mapping enhancements, including flexible address mapping; and enhanced language support, with expanded support for looping syntax and expanded pointer support. The recently announced BDTI High Level Synthesis Tool Certification Program results show that the PICO High Level Synthesis Platform produces quality of results comparable to hand-coded RTL.
Synfora PICO Extreme 9.04 Highlights
- Area improvements of up to 8%
- Enhanced mapping to Xilinx DSP48 units and enhanced timing estimates for complex operations, yielding improvements in achievable performance for FPGA designs of up to 25%
PICO Extreme FPGA extends high level synthesis technology to FPGA devices, enabling the implementation of dramatically larger and more complex FPGA sub-systems, such as video codecs, wireless modems and imaging pipelines, from untimed C algorithms with QoR comparable to manual designs. The PICO Extreme product line is based on an advanced optimizing compiler that transforms a sequential, untimed C algorithm into highly efficient register transfer language (RTL), reducing design and verification time, allowing designers to find the lowest cost implementation and enabling very rapid response to changes in the design specification. Using untimed C as the design entry language decreases design and verification time as well as improves design reuse across multiple device architectures.
More info: Synfora