Video: 40nm FPGA and 8.5-Gbps Transceiver Demo

Posted by Ken Cheung in Event on Thursday, June 19, 2008

Altera has a 4-minute video featuring its new 40nm FPGA. The video will showcase 1.5 Gbps LVDS performance and 8.5 Gbps transceiver operating with excellent signal integrity. Viewers will see eye diagrams demonstrating very low jitter, and learn how pre-emphasis and equalization improve signal integrity and allow for very long traces.

Stratix IV FPGA Features

  • Benefit from early access to TSMC's industry-leading 40 nm process technology
  • Design with the highest density, highest performance, and lowest power FPGAs
  • Get unprecedented system bandwidth with superior signal integrity at 8.5 Gbps

More info: Video Demo: 40 nm FPGA and 8.5 Gbps Transceiver

If you found this page useful, bookmark and share it on:

Possibly of Interest

 
FPGA Blog Newsletter
Don't have time to visit FPGA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:   

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.