Altera Stratix II GX FPGAs with SFI-5 Support

Altera Corporation (NASDAQ: ALTR) announced that their Stratix® II GX FPGAs support the SERDES Framer Interface Level 5 (SFI-5) standard. The Stratix® II GX FPGAs with embedded transceivers feature a 40- to 50-Gbps interface for high-performance optical communications applications. Stratix II GX FPGAs feature up to 20 high-speed serial transceiver channels that can operate at data rates between 600 Mbps and 6.375 Gbps. The SFI-5 specification is a chip-to-chip standard that ensures interoperability between forward-error correction (FEC) and the framer, as well as from industry-leading optical transponder devices.

The SFI-5 Optical Internetworking Forum (OIF) specification was developed to provide an interface between the network processing devices and the optical transponder to enable higher bandwidths. The SFI-5 standard addresses network transport formats including OC-768, STM256, and OTN OTU-3. In addition to supporting the SFI-5 standard, Altera® Stratix II GX FPGAs are designed to deliver an extensive set of optical and electrical protocols with low power and industry-leading signal integrity, making them an ideal solution for use in all high-speed designs.

The SERDES Framer Interface Level 5 (SFI-5) is a chip-to-chip and chip-to-module protocol that targets 40-Gbps applications. The standard is intended to support up to 50 Gbps of throughput to account for 25 percent overhead, and could also be combined into multiple instances to achieve 100 Gbps of aggregate bandwidth. The interface can be used for connection between an optical transport node (OTN ) or SONET/SDH Framer and a forward error correction (FEC) device; an OTN or SONET/SDH Framer and an external SERDES; or from a FEC device and an external SERDES.

Typical SFI-5 Application: 40G SFI-5 Transponder/Regenerator Cards
40G SFI-5 Transponder/Regenerator Cards

More info: Stratix II GX FPGA SFI-5 Protocol Altera Stratix II GX FPGA