Altera Debuts Software Development Kit for OpenCL

Altera released a software development kit for Open Computing Language. The tool is the FPGA industry’s first SDK for OpenCL. It combines the massively parallel architecture of a FPGA with the OpenCL parallel programming model. The Altera SDK for OpenCL is production ready and is available through the company’s early access program.

The SDK for OpenCL helps system developers and programmers familiar with C to quickly and easily develop high-performance, power-efficient FPGA-based applications in a high-level language. The Altera SDK for OpenCL enables FPGAs to work in concert with the host processor to accelerate parallel computation, at a fraction of the power compared to hardware alternatives.

The software development kit for OpenCL offers a unified, high-level design flow for hardware and software development that automates the time-consuming tasks required in typical hardware-design language (HDL) flows. The OpenCL tool flow automatically converts OpenCL kernel functions into custom FPGA hardware accelerators, adds interface IPs, builds interconnect logic and generates the FPGA programming file.

The Altera SDK for OpenCL includes libraries that link to OpenCL API calls within a host program running on the CPU. By automatically handling these steps, designers are able to focus their development efforts on defining and iterating their algorithms rather than designing hardware.

The SDK for Open Computing Language helps programmers to leverage the massively parallel, fine-grained architectures featured in FPGAs to accelerate parallel computation. Unlike CPUs and GPGPUs, where parallel threads are executed across an array of cores, FPGAs allow kernel functions to be transformed into dedicated, deeply pipelined hardware circuits that are multithreaded using the concept of pipeline parallelism. Each of these pipelines can be replicated many times to provide even more parallelism by allowing multiple threads to execute in parallel.

More info: Altera OpenCL for Altera FPGAs