FPGA Blog - field programmable gate array and structured asic

Share/BookmarkSubscribe

Altera Quartus II Software Version 10.0 for CPLD, FPGA, HardCopy ASIC

Posted by Ken Cheung in Tool on Wednesday, July 7, 2010

Altera announced version 10.0 of their Quartus II development software for CPLD, FPGA and HardCopy ASIC designs. Quartus II software v10.0 features 2X to 3X faster compile times than the nearest competitor for high-density designs. The latest software release includes support for Altera’s 28-nm Stratix V FPGA family and offers several new productivity features that enable design teams to achieve faster timing closure and shorten time to market. Both the Subscription Edition and the free Web Edition of Quartus II software v10.0 are now available for download.

Quartus II Software v10.0 Features

  • Expanded Rapid Recompile — now works with Quartus Integrated Synthesis for small design changes to deliver a compile time reduction averaging 50% compared to a full compile, and better timing preservation with consistent results
  • New 10Gb Ethernet MAC, 10G Base-R and XAUI PHY MegaCores functions are available in the latest release
  • DDR2 and DDR3 SDRAM Controller MegaCores functions supporting ALTMEMPHY and UniPHY are included in the Quartus II Subscription Edition software as part of the Altera IP Base Suite
  • Enhanced QXP File Support — enables design teams to facilitate design reuse by creating a custom component library with new post-fit netlists support in addition to existing post-synthesis netlists support
  • First production release of Quartus II Web Edition software for Linux
  • Now supports Windows 7 and SUSE Enterprise 11
  • 2X-3X faster compile times than the nearest competitor for high-density designs
  • New transceiver toolkit with real-time transceiver interface and bit-error rate testing capability
  • New Self-Service Licensing Center — set up or manage software and IP licenses more easily and quickly
  • Easier Synopsys design constraint (SDC) entry, with a new Getting Started Wizard
  • Expanded synthesis support — enhanced VHDL-2008 support with a more flexible HDL language structure
  • Enhanced configuration support — industry-standard, quad serial peripheral interface (SPI) flash devices and enhanced bitstream-compression scheme for faster configuration are also supported
  • Enhanced Quartus II software GUI — more native look-and-feel on the Linux OS platform

More info: Altera

Related Posts with Thumbnails

Custom Search

FPGA Blog Newsletter
Don't have time to visit FPGA Blog everyday? Then sign up for our free newsletter. We'll send you an email when we have something to share with you. Your email address will be kept confidential and we will not share, sell, or rent it to anyone. You can unsubscribe at any time by clicking a link in the email.

Enter your email address to sign up for our free newsletter:  

If you are familiar with RSS feeds, you can also sign up for our free blog feed. Our RSS feed is updated in real-time while our newsletter is updated daily.