Altera Quartus II Software v10.1

Altera rolled out version 10.1 of the Quartus II development software for CPLD, FPGA and HardCopy ASIC design. The Quartus II Subscription Edition software version 10.1 features the beta version of Qsys, which is Altera’s next-generation system-integration tool. Both the Subscription Edition and the free Web Edition of Quartus II software v10.1 are now available for download. A beta version of Qsys is available in the Quartus II Subscription Edition software.

Quartus II Software v10.1 Features

  • Complete support for the Altera MAX V CPLD device family
  • Support for the Altera Arria II GZ FPGA family
  • Expanded support for the Stratix V FPGA family
  • Rapid Recompile reduces compilation time by 65% on average
  • New External Memory Interface Toolkit for identifying calibration issues and measuring the margins for each DQ strobe (DQS) signal
  • Chip Planner includes a new window to let designers easily view and trace multiple critical timing paths
  • TimeQuest can report timing closure recommendations so designers can quickly and easily identify and resolve timing closure issues
  • Access to the latest version of the ModelSim tool (Mentor Graphics)
  • ModelSim-Altera edition and ModelSim-Altera starter edition include a waveform editor and improved Altera IP simulator support
  • Includes beta version of Qsys system-integration tool (nearly double the performance of Altera’s SOPC Builder tool)

More information: Altera