InPA Systems and S2C Integrate Multi-FPGA Debug Flow

InPA Systems and S2C are teaming together to develop and test an integrated solution for high-speed, multi-FPGA debug. The integrated technology is currently in beta. The integrated rapid prototype debug flow will be available in the third quarter of this year.

Enhanced Rapid Prototype Debug Flow Highlights

  • Integrated solution for high-speed, multi-FPGA debug
  • Combines InPA debug tools with V6 TAI Logic Module
  • High speed multi-FPGA debug with proven 4th generation prototyping hardware
  • Reduces design implementation iterations in FPGAs
  • Utilizes the S2C I/O connector to access user FPGA signals and the S2C LM controller FPGA that is on the V6 TAI Logic Module
  • InPA technology shares the same LM controller FPGA on the S2C TAI Logic Module
  • Separate board to control the high-speed multi-FPGA trigger and capture debug activity is not needed
  • Technology is still in beta, but it is expected to be released in Q3 2011

More info: S2C | InPA Systems