LatticeECP3 AMC Evaluation Platform

Lattice Semiconductor introduced the LatticeECP3 AMC evaluation platform for their Serial RapidIO 2.1 endpoint IP core. The LatticeECP3 AMC evaluation platform helps engineers to investigate and experiment with the features of the LatticeECP3 SERDES and SRIO core. The board features a single AMC module card edge interface, common options interface, and a Vita 57.1 FPGA Mezzanine Card (FMC) expansion connector. The evaluation and demonstration platform is based on the Advanced Mezzanine Card (AMC) form factor. The Serial RapidIO 2.1 IP core and AMC platform are available now.

LatticeECP3 AMC Evaluation Board

LatticeECP3 AMC Evaluation Platform

  • Single module AMC PCB card edge interface
  • Enables demonstration of AMC Fat Pipes
  • Common options interface
  • Vita 57.1 FPGA Mezzanine Card (FMC) expansion connector
  • Front-panel Small Form Factor Pluggable (SFP) cage
  • RJ45 network interface for 10/100/1000 Ethernet connectivity
  • 64M Serial SPI Flash
  • DDR2 memory components (256MB x 32 bits)
  • 32-bit parallel, non-volatile memory that can be read, erased and reprogrammed
  • Ability to exercise the core out of the box operating at 4×2.5Gbps
  • LatticeMico32 32-bit soft processor core
  • USB-B connection to UART for run-time control
  • Allows control of SERDES PCS registers using the Serial Client Interface (ORCAstra)
  • Switches, LEDs and displays for demonstration purposes
  • ispVM System software programming support
  • On-board reference clock sources

More information: Lattice Semiconductor