QuickLogic PolarPro II CSSP Platform

Posted by Ken Cheung in FPGA on Monday, March 3, 2008
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The PolarPro II, from QuickLogic Corporation (NASDAQ:QUIK), is a next-generation customer specific standard product (CSSP) platform. PolarPro II offers a compact, optimized I/O structure, increased responsiveness for its Very Low Power (VLP) mode, and greater embedded SRAM configurability, along with other additional features to reduce PCB space and system Bill-Of-Materials (BOM) costs. The first platform in the PolarPro II family will begin sampling in April 2008, with other family members to follow. Device capacity will range to as many as 27 Customizable Building Blocks (CBBs). The first platform will be available in a package size as small as 5×5 mm (TFBGA) for reduced board space and cost, as well as in known good die configurations.

The PolarPro II family is specifically designed to meet the connectivity, intelligence, security, and system logic requirements of portable and mobile applications. It offers a wide range of I/O interfaces for the mobile market. Coupled with a library of proven system blocks for its configurable fabric, PolarPro II addresses critical connectivity, control and intelligence needs in mobile device design, delivering solutions based on our customers' specific requirements.

The new family features a compact architecture that allows for higher levels of integration in a single device. It is the ideal silicon platform for delivering customer- or market-specific combinations of QuickLogic's proven system blocks for storage, wired/wireless communication, video/imaging, security and other custom functions. PolarPro II also enables higher design flexibility. The I/O section, for instance, now offers 8 independently-powered banks to simplify integration into multi-voltage systems, eliminating the need for costly level-shifting circuitry.

PolarPro II also offers a more advanced power management scheme. The core voltage can now scale as low as 1.5V to reduce dynamic power consumption. The platform also offers a VLP mode that freezes device operation, during which the static current drops to less than 5 uA. Entry and exit from the VLP mode are as fast as 10 microseconds, allowing system developers to conserve energy by shutting down the device in between bursts of activity.

More info: QuickLogic

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