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Actel Design Examples for Low-Power FPGA Applications

Posted by Ken Cheung in Reference Design on Monday, May 4, 2009

Actel introduced eight free design examples for use with their low-power, flash-based FPGAs. The design examples are optimized for use with Actel’s low power ProASIC 3 FPGAs and IGLOO FPGAs, including the lowest power FPGAs in the industry, IGLOO nano. The design examples are specifically targeted at designs requiring a low-power companion solution for input/output (I/O) expansion, interface conversion, or power and clock management.

Each design example consists of an application note and design files, which may include HDL source code, testbenches, software and supporting design files. All design examples have been verified on Actel development kits and can be modified to optimize specific system implementations for reduced cost or for enhancing the capability of designers to differentiate their products.

The design examples feature complete and fully tested solutions that are ready-to-use and customizable. The design examples are ideal for designers of low-power, high-volume applications. The design examples enable system designers to focus on critical issues, reduce design time, boost productivity and accelerate their product’s time-to-market.

Actel Design Examples

  • GPIO Expansion Using UART
  • UART-to-SPI Interface
  • Implementing an OLED Controller Parallel Interface
  • SPI-to-I2C Interface
  • Using IGLOO and ProASIC3 FPGAs as a System Power Sequencer
  • Clock Generation and Distribution
  • Microcontroller I/O Expander
  • Level Shifter

More info: Actel Design Examples

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