The AxisNT PowerDPD linearization IP solution, from Axis Network Technology, is a triple mode power amplifier module. The AxisNT PowerDPD offers a 45% final stage efficiency for UMTS ETSI compliant 64QAM systems at 2.1GHz. The solution uses just a power amplifier module and IP block resident in the transmitter chain FPGA. The AxisNT PowerDPD linearization IP solution is available as an embedded net list for use in either Altera or Xilinx FPGAs.
AxisNT PowerDPD supports UMTS, CDMA, and OFDM (DVB, WiMAX and LTE) air interfaces. The solution supports up to 30MHz of signal bandwidth and single and multicarrier signals for all modes. It combines a Crest Factor Reduction (CFR) block and Digital Predistortion (DPD) block to maximise the efficiency of the amplifier module whilst ensuring compliance to stringent ETSI and FCC requirements.
AxisNT PowerDPD Highlights
- Reduces the peak-to-average ratio (PAR) for single-carrier and multi-carrier signals
- Improves adjacent channel leakage ratio (ACLR) without the need for separate chipset or DSP
- Enables 45% efficiency using Axis Power Amplifiers
- Simple to implement – Available as a net list for FPGA implementation, no additional board space or components required
- Significantly reducing cost for multi-channel MIMO systems, as processing block and feedback path are shared across up to 4 transmitters
- Supports single and multicarrier environments, managing LO suppression to ETSI and FCC requirements in non adjacent carrier configurations
- Proven for use in burst mode systems such as TDD-LTE and TD-SCDMA
More info: Axis Network Technology