Pentek releases new Onyx family 3U VPX board, based on Xilinx Virtex-7 FPGA

Pentek has announced the Model 52751, the newest addition to the Onyx family. The Model 52571 is a two-channel, wideband transceiver 3U VPX board, based on the Xilinx Virtex-7 FPGA. It is suitable for connection to HF or IF ports of communication or radar systems.

The Model 52751 includes two 500 MHz 12-bit A/Ds followed by two DDCs, and two 800 MHz 16-bit D/As with a DUC. Factory installed Virtex-7 FPGA functions include two A/D acquisition modules, a D/A waveform generation IP module, data multiplexing, channel selection, data packing, gating, triggering, synchronization and memory control. Programmable decimation and interpolation ranges for each DDC and DUC cover transceiver signal bandwidths from 4 kHz to 200 MHz.

Enhanced applications
The Model 52571 is designed for use in applications such as digital RF memory, electronic countermeasure systems, radar, SIGINT, and wideband communication. The Virtex-7 performance enhancements made to the Model 52571 allow more data to be collected and processed faster. This results in enhanced results in the application areas. For example, in communications applications, more signals can be captures and classified in real-time through more detailed analysis; for airborne SIGINT, more terrain can be covered in less time, reducing risks of detection; ground-penetrating radar systems gain wider bandwidths for generating and processing radar pulses to detect buried explosives.

Development tools and software support
The GateXpress PCIe Configuration Manager is a sophisticated FPGA-PCIe hardware engine for managing the reconfiguration of the FPGA. At power up, the GateXpress manager immediately presents a PCIe target to the host computer for discovery and enumeration, giving the FPGA time to load from FLASH. Once booted, the GateXpress manager offers multiple options for dynamically reconfiguring the FPGA with a new IP image, handling the hardware negotiation and streamlining the loading task. GateXpress also allows dynamic FPGA reconfiguration across the PCIe interface through a runtime software task on the host computer.

A key benefit of the GateXpress manager is its ability to use a default power-up configuration image in non-volatile FLASH memory to enable booting of a system. Once booted, the sensitive mission-signature configuration image can then be uploaded into the FPGA by the system host from a disk file, a network source, or a radio link. Thus, no non-volatile version of the sensitive mission image exists in the module, affording a high degree of security in the event of loss or capture of the system.

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