Pentek’s Model 7150 High Speed Data Converter features four 200 MHz, 16-bit A/Ds, and a pair of high-performance Xilinx Virtex-5 FPGAs. The 7150 connects directly to the RF or IF inputs of a communications system, delivering the industry’s highest resolution A/Ds and enhanced processing power in a single PMC/XMC module. The Pentek 7150 stands apart from competing products on the market because its unique architecture combines the faster and higher precision DSP slices in the two Xilinx Virtex-5 FPGAs with four 200 MHz, 16-bit A/D converters offering increased resolution and wider signal bandwidths. This combination is ideal for anyone seeking to detect very small signals across a wide range of frequencies.
Pricing of the PMC version of the Model 7150 starts at $13,500 US. The 135 MHz version of the 7150 is currently shipping. The 200 MHz version will be available 14-16 weeks ARO.
Model 7150 Highlights
- Powerful Virtex-5 FPGAs
- Synchronization and Clocking
- Doubled DRAM
- Flexible Form Factor
- Extensive Support
Two Powerful Virtex-5 FPGAs
The dual FPGA architecture of the 7150 simplifies task assignments and boosts efficiency for each device. The processing FPGA handles data flow and data routing, controls all clock and synchronization functions, and manages memory resources. It is at the center of all data flow paths making it ideally positioned for performing DSP and data processing. The interface FPGA is responsible for providing the board’s system connectivity through a PCI-X or optional PCIe interface. By assigning the board interfaces and the associated resources to this second FPGA, the processing FPGA can be kept free to performing the processing tasks it is designed for. Because Xilinx maintains a consistent pin configuration among its various Virtex-5 family devices, different sizes and family types of the Virtex-5 family can be substituted on the Model 7150 to fulfill specific user needs. Virtex-5 LXT devices may be the choice for users with demanding logic requirements, while SXT devices may best satisfy DSP-intensive applications. The future FXT family offers embedded PowerPC processors for microcontroller functions.
Synchronization and Clocking
Another important feature of the 7150 is the front-panel synchronization bus. Multiple boards can be easily synchronized via a multi-pin ribbon cable to create larger multi-channel systems. Synchronization signals include reset, gates, PPS, sync and clocks. In addition to the sync bus, the sampling clock can be sourced from an onboard crystal oscillator or through a front-panel external clock input connector.
Connected to the main processing FPGA are three banks of DDR2 Synchronous DRAM. Compared to previous designs, the 7150 doubles the amount of synchronous DRAM to a total of 1.5 GB, supporting real-time capture of 2.56 seconds of data sampled at 200 MHz. This large transient capture capability is essential for applications like wideband radar. The DDRS SDRAM acts as a large elastic buffer, capturing data in real time and delivering it at a slower aggregate rate through the module interfaces. Built-in triggering modes allow capture of a wide range of block sizes, while DMA controllers simplify data transfers to the PCI-X bus.
Flexible Form Factor
The 7150 is designed to the PMC/XMC standard allowing it to mount on VME/VXS host boards. In addition, the board is available in other form factors including PCI and PCIe for use in desk top computers and blade servers, and 3U and 6U compact PCI. Initially, the 7150 will be delivered with a PCI-X interface, with a PCIe option available later this year.
The 7150 is supported under Linux, Windows and VxWorks with board support packages for each OS. The BSPs include an OS driver as well as a full feature ReadyFlow C language library to support all board functions and provide sample applications for quick development startup. Pentek provides a GateFlow FPGA design kits for both FPGAs. Each GateFlow kit provides the factory installed functions as a project that can be imported into the Xilinx ISE tools, allowing users to build their own functions and data processing into the IP.