Evatronix has updated NAND Flash memory controller to meet the 2.2 specifications of the Open NAND Flash interface (ONFi) and now fully supports the newest High Speed NAND Flash. This enables the development of applications that will leverage the ability of new memory technologies to operate with speeds of up to 200 MB per second. The updated NAND Flash Controller IP is available now for implementation in any FPGA or ASIC technology.
The updated NAND Flash Controller IP is delivered as an RTL source code with a set of scripts and macros for simulation/synthesis support or as an FPGA netlist targeted to the latest programmable devices. The NAND Flash controller IP is complemented by a dedicated software driver that supports hardware features of the controller.
The latest release of the NAND Flash controller also implements the most advanced error correction mechanism to date. The Bose, Chaudhuri, and Hocquenghem (BCH) code can correct up to 32 bits per page, and the configuration script provided with the controller allows user to define the exact even number of bits to be corrected.
The controller supports all types of memories — High Speed SLC, SLC and MLC memories. An advanced mechanism allows all these memories to be connected simultaneously, thus giving the SoC designer the freedom to choose the best memory for each task within his application.
More info: Evatronix