Interfacing Micron DDR2 Memories to Xilinx Spartan-3A/AN FPGAs

Nu Horizons Electronics Corp. (NASDAQ: NUHC) released the first in a new series of application notes aimed at assisting engineers in identifying each key element in the design process. The “Step-by Step Guide” focuses on interfacing the Micron MT47H family of DDR2 SDRAM to Xilinx Spartan 3A/AN FPGAs. The guide includes design examples that describe how to select from a range of possible products based on key design criteria. The application note also includes information on specific features to include or exclude, how to make pin assignments to simplify routing, and how to control signal routing during board layout to hit signal timing and skew requirements.

The application note is designed to walk engineers through all the design tasks required when designing with Micron DDR2 memory and Xilinx Spartan 3A/AN FPGA. The guide is divided into the following sections:

  • Device Selection
  • FPGA Design
  • Board Design Considerations
  • Conclusions
  • Appendix A: A Step-By-Step Guild to Using MIG

Information included in the guide is compiled from over seven different datasheets and application notes. It also includes an appendix that describes in detail how to use the Xilinx Memory Interface Generator (MIG) used to create the DDR2 memory controller. The design examples provided in the guide are based on a proven development board. In addition, the supporting website delivers easy access all source documentation, development board purchasing, or checking part availability from a centralized location.

More information: Nu Horizons Step-By-Step Application Note (pdf)