National Instruments Introduces LabVIEW FPGA IP Builder

National Instruments (NI) LabVIEW FPGA IP Builder

National Instruments introduced LabVIEW FPGA IP Builder, which is an add-on to their LabVIEW FPGA Module. The NI LabVIEW FPGA IP Builder helps designers generate high-performance field-programmable gate array IP by combining high-level synthesis (HLS) technology with the LabVIEW graphical development and NI FPGA-based hardware. LabVIEW FPGA IP Builder is priced from $4,999 (€5,199; ¥675,000).

LabVIEW FPGA IP Builder features Xilinx Vivado High-Level Synthesis technology to simplify high-performance FPGA algorithm design. The new LabVIEW add-on improves productivity by reducing the need for manual optimization of high-performance algorithms. Instead, engineers specify functional behavior along with design constraints and the software automatically generates a hardware implementation to meet requirements.

The new add-on generates custom algorithms like filters, encoders/decoders, and other analysis functions for use in NI FPGA-based applications for machine vision, control and simulation, sound and vibration, digital signal processing, and communication systems. Knowledge of hardware description languages (HDLs) is not needed. The tool also provides high-quality resource-use and performance results.

The NI LabVIEW FPGA IP Builder is tightly integrated with LabVIEW and the LabVIEW DSP Design Module, which is a module that helps researchers and system designers in the RF and telecommunications space quickly create communication links and multi-rate digital signal processing (DSP) algorithms on FPGAs.

NI LabVIEW FPGA IP Builder Features

  • Increased FPGA design abstraction for enhanced productivity
  • Improved algorithm performance and resource utilization
  • Separation of code and design constraints facilitates IP reuse
  • Seamless deployment to NI FPGA-based devices and integration with I/O
  • Quickly create high-performance and resource-efficient IP for NI FPGA-based devices
  • HLS technology for optimizing algorithms and meeting design requirements
  • Minimize code changes between LabVIEW desktop and FPGA algorithm implementation
  • Quickly explore design trade-offs without having to change algorithm

More info: NI LabVIEW FPGA IP Builder