Flexras Technologies launched their Wasga Compiler. The automatic partitioning tool increases multi-FPGA design by a factor of ten. Wasga Compiler complements FPGA-based SoC prototyping. The software tool features high clock frequencies, fast execution time, and unlimited design capacity. It supports multi-billion ASIC gates equivalents designs, and maps them to any Altera or Xilinx board. Wasga Compiler is available now.
Wasga Compiler is the first timing-driven, multi-FPGA partitioning software for ASIC and SoC prototyping. The software tool automatically partitions large designs onto multiple FPGAs while addressing chip resources, connectivity, and the clock frequency constraints required for running software applications in near real time. It maximizes prototyping system performance and solves hardware/software validation bottlenecks of next generation SoC devices.
Wasga Compiler performs better than other tools, which often fail to achieve an acceptable timing result, even with manual interventions. It delivers faster results and handles the largest designs (above one billion gates equivalent). It maximizes prototyped system performances, accelerates the prototyping process and enables to meet time-to-market challenges.
Wasga Compiler Features
- Includes a Graphical User Interface (GUI) to ease projects setup
- Allows automatic and/or manual placement
- Allows automatic and/or manual routing
- Integrates very high speed multiplexing IPs to increase inter-FPGA bandwidth
- Supports SDC for timing constraints and budgeting
- Provides system level static timing analysis
- Drives and runs automatically FPGA back-end flow
- Meets clock frequency required for running software applications
- Facilitates iterative runs and verification
More info: Flexras Wasga Compiler