Altera have optimized their Stratix V FPGA devices to support Micron Technology’s reduced-latency DRAM (RLDRAM 3 memory). The changes made to the Stratix V memory architecture make the memory interface ideal for high performance networking applications. RLDRAM 3 memory is designed to meet the requirements of high-bandwidth networking applications and enable a faster, more efficient transfer of data over the network.
Stratix V FPGAs feature a new memory architecture that delivers the FPGA industry’s highest system performance with low latency and high efficiency. Stratix V FPGAs provide networking equipment manufacturers with a memory interface solution capable of transferring voice, video and data across the Internet quickly and efficiently.
Stratix V FPGAs deliver a high-throughput memory interface to external memory devices such as RLDRAM 3. All of the critical circuits in the device’s read/write path are hardened to simplify timing closure at very high frequencies. To complement Stratix V FPGAs, Altera offers memory controller cores and associated design software that automatically reduces design cycle time when working with external memories.
More information: Altera