EnSilica eSi-RISC Validates with Precision Synthesis FPGA Design Flow

EnSilica’s range of eSi-RISC embedded processor cores and eSi-Comms library of communications IP has been fully validated for use in Mentor Graphics’ Precision Synthesis FPGA design flow, enabling design engineers to easily implement them on any FPGA device. eSi-RISC’s single architecture is scalable over a range of embedded applications. A high level of configurability enables hardware resources to be optimized to application requirements, minimizing area and power to a level not possible with a general purpose processor architecture. The highly pipelined nature of the design gives engineers a solution that can be migrated between FPGA types or even to ASIC technologies.

EnSilica's eSi-RISC embedded processors validated for Mentor Graphics' Precision Synthesis FPGA design flow

EnSilica’s eSi-RISC is a family of highly configurable and low-power soft processor cores for embedded systems that scales across a wide range of applications. It is the only processor architecture scalable from 16 bits to 32 bits, and encompassing optional DSP extensions, floating point and custom instructions. In addition, the memory architecture can be configured for Harvard or Von Neumann, or to include data and program caches. Using a mix of 16-bit and 32-bit instructions, it gives excellent code density, reducing the program code size by up to 40% compared to leading FPGA vendor processors such as NIOSII and MicroBlaze while the minimum configuration can be implemented in as little as 8K gates, providing class leading overall silicon area and very low power. System clock speeds of over 200MHz can be achieved in Altera Stratix IV and Xilinx Virtex-6 FPGAs and all processors use the industry standard AMBA APB and AXI buses. EnSilica also has a library of APB-based peripherals, including UART, SPI, I2C, Timers and a 10/100 Ethernet MAC.

EnSilica’s eSi-Comms library of highly parameterized communications IP is suitable for many of the current air interface standards including WLAN, WiMAX, DVB and DAB.

Precise-IP is Mentor Graphics’ vendor-independent FPGA IP platform. It is part of the Precision Synthesis product family that includes RTL, physical and rad-tolerant synthesis tools. Precision Synthesis is the centre-piece of the vendor-independent solution for FPGA design. The tool uses the same design source and constraints to target all major device vendors, enabling designers to synthesize eSi-RISC processors and eSi-Comms IP for optimal performance on any FPGA technology.

More information: EnSilica | Mentor Graphics