Lattice Supports RLDRAM I/II Memory Devices

Posted by Ken Cheung in FPGA on Monday, September 15, 2008

Lattice Semiconductor Corporation (NASDAQ: LSCC) is supporting Reduced Latency Dynamic Random Access Memory (RLDRAM®) I/II memory devices. The LatticeSC[tm] and LatticeSCM[tm] FPGA families (collectively, the "LatticeSC/M" families) now support RLDRAM I/II rates up to 800Mbps. The high-speed RLDRAM I and RLDRAM II memory controller IP (intellectual property) is implemented in Lattice's unique, low power MACO[tm] (Masked Array for Cost Optimization) structured ASIC technology.

Lattice's Masked Array for Cost Optimization (MACO) embedded structured ASIC blocks are available on LatticeSCM FPGA devices and deliver pre-engineered, standard-compliant IP functions developed by Lattice to shorten end-system time to market. Unlike the soft IP cores commonly used with FPGAs, the MACO IP functions are embedded into the devices, and there is no distinct IP license fee associated with their use. These enhanced memory controllers provide the industry's fastest programmable memory interfaces supporting next generation RLDRAM I/II memory devices, as well as DDR I/II and QDR II/II+ memory devices.

More info: Lattice Semiconductor

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