Microsemi launched their IGLOO2 field programmable gate array family. The new FPGA devices are ideal for industrial, commercial aviation, defense, communications and security applications. Pricing for IGLOO2 starts at less than $7 for high volume orders. The M2GL050 is shipping in volume production now with subsequent device configurations rolling out throughout 2013 and early 2014. IGLOO2 FPGAs will be available in extended temperature offerings of up to 125 degrees centigrade temperature junction.
Microsemi IGLOO2 FPGA Family Features
- Highest number of GPIOs for any given density node for 5G SERDES FPGAs
- Highest number of 5G transceivers density
- Highest number of PCI compliant 3.3V I/Os in the industry
- Highest number of PCIe endpoints
According to Microsemi, the non-volatile flash-based IGLOO2 FPGAs have the highest number of mainstream FPGA features including general purpose input/outputs (GPIOs), 5G SERDES interfaces, and PCI Express endpoints of any similar device on the market today, and feature the industry’s only high-performance memory subsystem.
When compared to other 5G SERDES-based FPGAs under 150K logic elements (LEs), IGLOO2′s high level of integration provides the lowest total system cost versus competitive FPGAs while improving reliability, significantly reducing power and systematically protecting valuable customers’ design IPs.
The IGLOO2 FPGA family requires only two power supplies, versus three for competitive devices. In addition, the non-volatile configuration of IGLOO2 eliminates the requirement for external flash memory, providing the system architect with a higher level of system integration, performance and reliability.
Microsemi’s IGLOO2 FPGAs provide a LUT-based fabric, 5G transceivers, high-speed GPIO, block RAM and DSP blocks in a differentiated, cost- and power-optimized architecture. The new IGLOO2 FPGA architecture offers up to five times more logic density and three times more fabric performance than the previous generation IGLOO family.
IGLOO2 features a high level of I/O and SERDES integration for I/O expansion, bridging, system management and co-processing. This enables designers to use smaller devices for I/O expansion and bridging solutions. This, coupled with the need for only two power supplies and no external configuration devices, reduces overall system cost and board complexity.
More info: Microsemi IGLOO2 FPGAs