LatticeECP4 FPGA Family

Lattice Semiconductor introduced their LatticeECP4 FPGA family. The next generation FPGA devices feature 6 Gbps SERDES, low cost wire-bond packages, powerful DSP Blocks and hard IP-based Communication Engines for cost- and power-sensitive wireless, wireline, video and computing applications. Samples of the LatticeECP4 devices will be available in the first half of 2012 and high-volume production delivery is scheduled for the second half of 2012. The LatticeECP4 FPGAs are ideal for remote wireless radio heads, distributed antenna systems, cellular basestations, ethernet aggregation, switching, routing, industrial networking, video signal processing, video transmission and data center computing.

Lattice Semiconductor LatticeECP4 FPGA family

The LatticeECP4 FPGA family consists of six devices that offer standards-compliant multi-protocol 6G SERDES in low cost wire-bond packages, DDR1/2/3 memory interfaces with speeds up to 1066 Mbps, and cascadable DSP blocks that are ideal for high performance RF, baseband and image signal processing. The new Lattice devices feature 1.25 Gbps LVDS I/O, up to 10.6 Mbits of embedded memory, up to 512 user I/O, and logic density range of 30K LUTs to 250K LUTs.

The next generation FPGA devices contain up to 16 CEI-compliant 6 Gbps SERDES channels with embedded Physical Coding Sub-layer (PCS) blocks in both low cost wire-bonded and high performance flip chip packages. The Communication Engines offer up to 10X the power and cost reduction of similar implementations in FPGA fabrics. The LatticeECP4 Communication Engines portfolio includes solutions for PCI Express 2.1, multiple 10 Gigabit Ethernet MAC and Tri-speed Ethernet MACs as well as Serial Rapid I/O (SRIO) 2.1.

The new Lattice family features powerful digital signal processing (DSP) blocks with 18×18 multipliers, wide ALUs, adder-trees and carry chains for cascadability. The flexible 18×18 multipliers can be split into 9×9 or combined into 36×36 to perfectly match application requirements. In addition, up to 576 multipliers can be cascaded together to build complex filters.

The LatticeECP4 FPGAs are up to 50% faster than previous generation devices and feature 1066 Mbps DDR3 memory interfaces and 1.25 Gbps LVDS I/Os that are also capable of being provisioned as serial Gigabit Ethernet interfaces. The new LatticeECP4 family also has 66% more logic resources and 42% more embedded memory to empower design engineers to construct complete systems-on-chip in FPGAs.

Lattice Semiconductor LatticeECP4 FPGAs

LatticeECP4 FPGA Family Features

  • Low power 65nm process with 4-input look-up table (LUT) fabric
  • Logic densities from 30K to 250K LUTs
  • Up to 10.6 Mbits of Embedded Block RAMs (EBRs)
  • Up to 600 Kbits of distributed RAM
  • CEI-Compliant 6G SERDES in low-cost packages
  • Up to 16 channels with data rates from 155 Mbps to 6 Gbps
  • Lower power consumption of 175mW per channel at 6 Gbps
  • Buit-in pre-empahsis and decision feedback equalization (DFE)
  • Up to 22 hard-wired IP Engines for popular protocols
  • PCIe 2.1 x4, 10GbE, tri-speed MAC, SRIO 2.1
  • Seamless interfaces with SERDES/PCS and fabric
  • Flexible System Planner software design tool
  • Fully featured DSP Blocks with multiply, accumulate, addition, and subtraction
  • Up to 576 cascadable 18×18 multipliers with ALUs and wide adder trees
  • Unique booster and pre-adder logic increases throughput 4X
  • Build complex filters for wireless and video applications
  • Differential I/Os up to 1.25 Gbps data rate (GIGA sysIOs)
  • Gigabit serial I/Os using embedded CDRs (Clock Data Recovery Circuits)
  • Up to 40 embedded CDRs
  • 1066 Mbps DDR3 memory interface
  • LVCMOS 33/25/18/15/12 and PCI
  • SSTL 33/25/18/15, HSTL15 and HSTL18
  • LVDS, Bus-LVDS, RSDS, MLVDS and LVPECL
  • Voltage level shifters
  • 8 DLLs and 8 PLLs per device
  • Up to 512 user I/O pins
  • 6G short reach (SR) interfaces on low cost wire-bond fpBGA packages
  • 6G long reach (LR) interfaces on high performance flip-chip fcBGA packages
  • Pb-free and RoHS compliant
  • Configure with SPI boot Flash or parallel burst-mode Flash
  • Dual-boot provides backup configuration copy
  • 128-bit AES encryption
  • Live updates with TransFR Technology

More info: Lattice Semiconductor LatticeECP4 Family