ITU G.707, GR-253-CORE SONET/SDH Compliant Solutions

Posted by Ken Cheung in FPGA-based Product on Monday, September 24, 2007

Lattice Semiconductor (NASDAQ: LSCC) and Silicon Laboratories (NASDAQ: SLAB) will market the ITU G.707 and GR-253-CORE compliant solutions for telecom applications that provide customers with flexibility, high performance and quicker time to market. Silicon Labs' Si5023 multi-rate clock and data recovery (CDR) device, Any-Rate Si570 programmable crystal oscillator (XO), and Si5326 Any-Rate precision clock simplify OC-3/12/48 timing architectures and ensure compliance with SONET/SDH jitter specifications. LatticeSC(TM) and LatticeSCM(TM) FPGAs (LatticeSC/M FPGAs) provide field programmability and a built-in SONET PCS block to accelerate market entry.

LatticeSC/M FPGA devices, with their industry-exclusive SONET flexiPCS(TM) block, enable telecom equipment vendors to implement programmable SONET/SDH solutions at a lower cost, lower power, and faster time to market. Additional embedded IP is also available on the MACO(TM)-enabled LatticeSCM devices to build high performance Packet over SONET (PoS) bridges and gaskets.

Silicon Labs' multi-rate CDR, XOs and clock products can be used in conjunction with the LatticeSC FPGA for a complete SONET solution. The Si5023 multi-rate CDR is able to minimize data jitter associated with the LatticeSC device's SERDES outputs while Silicon Laboratories' crystal oscillator and clock devices provide easily reprogrammable reference clock frequencies to the FPGA.

More info:
Lattice, Silicon Laboratories Team on SONET/SDH Compliant Solutions
Lattice Semiconductor
Silicon Laboratories

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